Array substrate, manufacturing method thereof and display device

US9910327B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9910327-B2
Application numberUS-201515324981-A
CountryUS
Kind codeB2
Filing dateDec 31, 2015
Priority dateAug 27, 2015
Publication dateMar 6, 2018
Grant dateMar 6, 2018

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate includes: a substrate; a plurality of pixel units provided on the substrate, each of the pixel units including a plurality of functional layers; and a light shielding assembly arranged between adjacent pixel units. The light shielding assembly including: a light shielding layer; a light absorption layer overlaid on the light shielding layer; and an antireflection layer overlaid on the light absorption layer. By means of providing an antireflection layer the light shielding assembly, it can decrease the reflection of the external ambient light on the light shielding assembly, thereby improving the display contrast and the image display quality.

First claim

Opening claim text (preview).

What is claimed is: 1. An array substrate, comprising: a substrate; a plurality of pixel units provided on the substrate, each of the pixel units comprising a plurality of functional layers; and a light shielding assembly arranged between adjacent pixel units, wherein the light shielding assembly comprises: a light shielding layer; a light absorption layer overlaid on the light shielding layer; and an antireflection layer overlaid on the light absorption layer, wherein the antireflection layer is made from at least one of indium tin oxide, indium zinc oxide, and aluminum zinc oxide. 2. The array substrate according to claim 1 , wherein the antireflection layer is formed of a transparent conductive film. 3. The array substrate according to claim 2 , wherein the functional layers comprise a planarization layer, a first electrode layer disposed on the planarization layer, a first passivation layer disposed on the first electrode layer and a second electrode layer disposed on the first passivation layer. 4. The array substrate according to claim 3 , wherein the light shielding assembly is disposed between the first electrode layer and the planarization layer. 5. The array substrate according to claim 4 , wherein the antireflection layer of the light shielding assembly and the first electrode layer are made from the same material and disposed in the same layer. 6. The array substrate according to claim 3 , wherein the light shielding assembly is disposed between the second electrode layer and the first passivation layer. 7. The array substrate according to claim 6 , wherein the antireflection layer of the light shielding assembly and the second electrode layer are made from the same material and disposed in the same layer. 8. The array substrate according to claim 3 , wherein the light shielding assembly is disposed between the first electrode layer and the first passivation layer. 9. The array substrate according to claim 8 , wherein the light shielding layer is made from a metal material or a metal alloy material. 10. The array substrate according to claim 1 , wherein the light shielding layer is made from at least one of aluminum, chromium, copper, molybdenum, titanium, aluminum-neodymium alloy, copper-molybdenum alloy, molybdenum-tantalum alloy and molybdenum-neodymium alloy. 11. The array substrate according to claim 1 , wherein the light absorption layer is made of a metal oxide, a metal nitride, or a metal oxynitride. 12. A display device, comprising the array substrate according to claim 1 . 13. A manufacturing method of an array substrate, comprising steps of: forming a plurality of pixel units on the substrate, wherein each of the pixel units comprises a plurality of functional layers; and forming a light shielding assembly between adjacent pixel units, wherein the light shielding assembly comprises: a light shielding layer; a light absorption layer overlaid on the light shielding layer; and an antireflection layer overlaid on the light absorption layer, wherein the antireflection layer is made from at least one of indium tin oxide, indium zinc oxide, and aluminum zinc oxide. 14. A display device, comprising the array substrate according to claim 2 . 15. A display device, comprising the array substrate according to claim 3 . 16. A display device, comprising the array substrate according to claim 4 . 17. A display device, comprising the array substrate according to claim 5 . 18. A display device, comprising the array substrate according to claim 6 . 19. A display device, comprising the array substrate according to claim 7 .

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element · CPC title

  • Electricity · mapped topic

  • characterised by their electrical, optical, physical properties; materials therefor; method of making · CPC title

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What does patent US9910327B2 cover?
An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate includes: a substrate; a plurality of pixel units provided on the substrate, each of the pixel units including a plurality of functional layers; and a light shielding assembly arranged between adjacent pixel units. The light shielding assembly including: a light shielding layer; a light ab…
Who is the assignee on this patent?
Boe Technology Group Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/136209. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Mar 06 2018 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).