Apparatus and method for decoding LDPC codes

Patent metadata

Field	Value
Publication number	US-10879930-B2
Application number	US-201816237315-A
Country	US
Kind code	B2
Filing date	Dec 31, 2018
Priority date	Jul 26, 2018
Publication date	Dec 29, 2020
Grant date	Dec 29, 2020

Abstract

A decoding method for a low density parity check (LDPC) code includes: updating a first check node, among a plurality of check nodes, by receiving, by the first check node, a bit decision and an associated first reliability value from each of a subset of variable nodes including a first variable node among a plurality of variable nodes, calculating a syndrome value and a second reliability value of the first check node based on the received bit decisions and first reliability values, and outputting the calculated syndrome value and second reliability value of the first check node to a variable node of the plurality of variable nodes but not of the subset of variable nodes; and updating the first variable node by receiving, by the first variable node, a syndrome value and a second reliability value of a second check node among the plurality of check nodes, and updating the first reliability value of the first variable node based on the syndrome value and the second reliability value of the second check node.

First claim

What is claimed is:

1. A decoding method for a low density parity check (LDPC) code in a memory system having a controller, comprising:
resetting an iteration number and first reliability values q n of a plurality of variable nodes v n ;
calculating hard-decision values of the plurality of variable nodes v n from a received signal, and deciding a hard-decision vector;
transferring the hard-decision vector and the first reliability values q n to a plurality of check nodes c n ;
calculating syndrome values s m for the plurality of check nodes using the hard-decision vector, and deciding a syndrome vector value s ;
calculating second reliability values r mn corresponding to the syndrome values s m for the plurality of check nodes using the first reliability values q n , when the syndrome vector value s is not 0;
calculating weights w mn for the plurality of variable nodes connected to each of the check nodes using the second reliability values r mn ;
calculating flipping function values E n (l) of the plurality of variable nodes using the weights w mn ;
calculating a flipped flipping function value −E n (l) by flipping the bit of the variable node having the largest flipping function value among the flipping function values E n (l) of the plurality of variable nodes;
calculating a reliability function value D n (l) using the flipping function value of the variable node of which the bit value is flipped; and
comparing the reliability function value D n (l) to a threshold value η, and updating the first reliability value q n of the variable node of which the bit value is flipped.

2. The decoding method of claim 1 , wherein the resetting of the first reliabilities of the plurality of variable nodes comprises setting each of the first reliability values for the plurality of variable nodes to a high or a low reliability value.

3. The decoding method of claim 1 , wherein the calculating of the second reliability values r mn of the syndrome values s m for the respective check nodes using the first reliability values q n comprises calculating the second reliability values r mn of the syndrome values, by performing an OR operation on the first reliability values q n′ of other variable nodes excluding a variable node to receive the second reliability value r mn , among variable nodes connected to any one check node among the plurality of check nodes.

4. The decoding method of claim 3 , wherein the second reliability value r mn is calculated through the following equation:

r
mn

=

{

1
,

∑

n
′

∈

N
⁡

(
m
)

⁢
\
⁢

⁢
n

⁢

q

n
′

≥
1

0
,

otherwise

,

where n′ represents the other variable nodes, and

∑

n
′

∈

N
⁡

(
m
)

⁢
\
⁢

⁢
n

⁢

q

n
′

≥
1

is calculated by performing an OR operation on the first reliability values q n′ of the other variable nodes.

5. The decoding method of claim 1 , wherein in the calculating of the weights w mn for the plurality of variable nodes connected to each of the check nodes using the second reliability value r mn ,
the weights w mn are calculated through the following equation:

w
mn

=

{

α
s

⁢

⁢
for

r
mn

=
0

α
w

⁢

⁢
for

r
mn

Assignees

• Sk Hynix Inc
• Korea Advanced Inst Sci & Tech

Inventors

• Ha Jeong Seok
• Oh Ji Eun
• Kim Dae-Sung

Classifications

• H03M13/43

  Majority logic or threshold decoding · CPC title

• H03M13/1108 Primary

  Hard decision decoding, e.g. bit flipping, modified or weighted bit flipping · CPC title

• H03M13/1131 Primary

  Scheduling of bit node or check node processing · CPC title

• H03M13/1125

  using different domains for check node and bit node processing, wherein the different domains include probabilities, likelihood ratios, likelihood differences, log-likelihood ratios or log-likelihood difference pairs · CPC title

• H03M13/1575

  Direct decoding, e.g. by a direct determination of the error locator polynomial from syndromes and subsequent analysis or by matrix operations involving syndromes, e.g. for codes with a small minimum Hamming distance · CPC title