Semiconductor device and forming method thereof

Patent metadata

Field	Value
Publication number	US-10879115-B2
Application number	US-201715820419-A
Country	US
Kind code	B2
Filing date	Nov 21, 2017
Priority date	Nov 21, 2017
Publication date	Dec 29, 2020
Grant date	Dec 29, 2020

Abstract

A method includes forming a first metal into a first trench in a dielectric layer, performing a thermal treatment to the first metal such that an average grain size of the first metal is increased, and performing a first chemical mechanical polish (CMP) process to the first metal after the performing the thermal treatment.

First claim

What is claimed is:

1. A method, comprising:
forming a first metal into a first trench in a dielectric layer;
forming a second metal over the first metal;
performing a thermal treatment to the second metal such that an average grain size of the second metal is increased;
performing, using a first slurry, a first chemical mechanical polish (CMP) process to the second metal after the performing the thermal treatment, wherein the first CMP process uses the first metal as a CMP stop layer;
after performing the first CMP process, oxidizing a surface layer of the first metal and a surface layer of the second metal; and
performing, using a second slurry, a second CMP process to the oxidized surface layer of the first metal and the oxidized surface layer of the second metal.

2. The method of claim 1 , wherein the first metal is different from the second metal and is formed into a second trench in the dielectric layer, and the second trench is narrower than the first trench.

3. The method of claim 2 , wherein the thermal treatment is performed further such that an average grain size of the first metal is increased.

4. The method of claim 3 , wherein the increasing of the average grain size of the second metal is greater than the increasing of the average grain size of the first metal.

5. The method of claim 2 , wherein the second trench is free from the second metal.

6. The method of claim 2 , wherein the first metal has a higher resistance to the first CMP process than that of the second metal.

7. The method of claim 1 , wherein the second metal is formed to fill a recess in the first metal in the first trench.

8. The method of claim 1 , wherein the second metal has a higher resistance to the second CMP process than that of the first metal.

9. The method of claim 1 , further comprising:
forming a barrier layer into the first trench in the dielectric layer prior to the forming the first metal and the forming the second metal, wherein the barrier layer has a higher resistance to the second CMP process than that of the first metal.

10. The method of claim 1 , wherein the first metal comprises a ruthenium-containing material and the second metal comprises a copper-containing material.

11. The method of claim 1 , wherein the thermal treatment is performed by a thermal soaking with a hydrogen gas.

12. A method, comprising:
forming a barrier layer in a first trench in a dielectric layer;
forming a first metal having a first crystal orientation ratio over the barrier layer;
performing a first thermal treatment to the first metal to form a treated first metal, wherein the treated first metal has a second crystal orientation ratio different from the first crystal orientation ratio;
after performing the first thermal treatment to the first metal, forming a second metal over and in contact with the treated first metal;
performing a second thermal treatment to the second metal to form a treated second metal;
after the performing the second thermal treatment, performing at least one chemical mechanical polish (CMP) process to the treated first and second metals using the barrier layer as a CMP stop layer;
after performing the at least one CMP process, oxidizing a surface layer of the treated first metal and a surface layer of the treated second metal; and
removing the oxidized surface layer of the treated first metal and the oxidized surface layer of the treated second metal.

13. The method of claim 12 , wherein the first metal has a first average grain size, and the treated first metal has a second average grain size greater than the first average grain size.

14. The method of claim 12 , wherein the first thermal treatment increases ruthenium grains of the first metal having a (002) crystal orientation greater than a (101) crystal orientation thereof.

15. The method of claim 12 , wherein the first metal forms into a second trench narrower than the first trench in the dielectric layer, and the second metal does not fill the first trench.

16. The method of claim 12 , wherein a portion of a second metal is below a topmost surface of the dielectric layer.

17. The method of claim 12 , wherein oxidizing the surface layer of the treated first metal and the surface layer of the treated second metal is performed without oxidizing the barrier layer.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Lee Ming-Han
• Fu Shih-Kang
• Lu Meng-Pei
• Shue Shau-Lin

Classifications

• H10P52/403 Primary

  of conductive or resistive materials · CPC title

• H10W20/435

  Cross-sectional shapes or dispositions of interconnections · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/033

  in openings in dielectrics · CPC title

• H10W20/056

  by filling conductive material into holes, grooves or trenches · CPC title