Multilayer ceramic capacitor and multilayer ceramic capacitor-mounting structure

US10879004B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10879004-B2
Application numberUS-201916400135-A
CountryUS
Kind codeB2
Filing dateMay 1, 2019
Priority dateJun 4, 2018
Publication dateDec 29, 2020
Grant dateDec 29, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multilayer ceramic capacitor includes a multilayer body which includes stacked dielectric layers, first and second principal surfaces facing each other, first and second end surfaces facing each other, first inner electrode layers alternately stacked with the dielectric layers and exposed on the first end surface, second inner electrode layers alternately stacked with the dielectric layers and exposed on the second end surface, a first outer electrode connected to the first inner electrode layers and disposed on the first end surface, and a second outer electrode connected to the second inner electrode layers and disposed on the second end surface.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer ceramic capacitor comprising: a multilayer body including a plurality of stacked dielectric layers, a first principal surface, a second principal surface facing the first principal surface in a height direction, a first side surface, a second side surface facing the first side surface in a width direction perpendicular or substantially perpendicular to the height direction, a first end surface, and a second end surface facing the first end surface in a length direction perpendicular or substantially perpendicular to the height direction and the width direction; a plurality of first inner electrode layers alternately stacked with the plurality of dielectric layers and exposed on the first end surface; a plurality of second inner electrode layers alternately stacked with the plurality of dielectric layers and exposed on the second end surface; a first outer electrode connected to the first inner electrode layers and disposed on the first end surface; and a second outer electrode connected to the second inner electrode layers and disposed on the second end surface; wherein the first outer electrode includes a first resin outer electrode layer containing a thermosetting resin and a conductive filler, and a first base electrode layer containing glass and a conductive metal; the second outer electrode includes a second resin outer electrode layer containing a thermosetting resin and a conductive filler, and a second base electrode layer containing glass and a conductive metal; the first resin outer electrode layer directly covers about one half of the first end surface; the second resin outer electrode layer directly covers about one half of the second end surface; the first base electrode layer directly covers about another half of the first end surface; and the second base electrode layer directly covers about another half of the second end surface. 2. The multilayer ceramic capacitor according to claim 1 , wherein the first resin outer electrode layer extends from the first end surface to a portion of the first principal surface, a portion of the first side surface, and a portion of the second side surface; and the second resin outer electrode layer extends from the second end surface to a portion of the first principal surface, a portion of the first side surface, and a portion of the second side surface. 3. The multilayer ceramic capacitor according to claim 1 , wherein the first base electrode layer extends from the first end surface to a portion of the second principal surface, a portion of the first side surface, and a portion of the second side surface; and the second base electrode layer extends from the second end surface to a portion of the second principal surface, a portion of the first side surface, and a portion of the second side surface. 4. The multilayer ceramic capacitor according to claim 1 , wherein the first outer electrode further includes a first plating layer covering the first resin outer electrode layer and the first base electrode layer; and the second outer electrode further includes a second plating layer covering the second resin outer electrode layer and the second base electrode layer. 5. The multilayer ceramic capacitor according to claim 1 , wherein a thickness of a central portion of the first resin outer electrode layer on the first end surface is about 5 μm to about 30 μm; and a thickness of a central portion of the second resin outer electrode layer on the second end surface is about 5 μm to about 30 μm. 6. The multilayer ceramic capacitor according to claim 1 , wherein the thermosetting resin in each of the first and second resin outer electrode layers is at least one of an epoxy resin, a phenol resin, a urethane resin, a silicone resin, and a polyimide resin. 7. The multilayer ceramic capacitor according to claim 1 , wherein the conductive filler in each of the first and second resin outer electrode layers is at least one of Ag, Cu, an alloy of Ag, and an alloy of Cu. 8. The multilayer ceramic capacitor according to claim 1 , wherein a thickness of a central portion of the first base electrode layer on the first end surface is about 5 μm to about 30 μm; and a thickness of a central portion of the second base electrode layer on the second end surface is about 5 μm to about 30 μm. 9. The multilayer ceramic capacitor according to claim 1 , wherein the glass in each of the first and second base electrode layers includes B, Si, Ba, Mg, Al, and Li. 10. The multilayer ceramic capacitor according to claim 1 , wherein the conductive metal in each of the first and second resin outer electrode layers is at least one of Cu, Ni, Ag, Pd, an Ag—Pd alloy, and Au. 11. A multilayer ceramic capacitor-mounting structure comprising: a multilayer ceramic capacitor including: a multilayer body including a plurality of stacked dielectric layers, a first principal surface, a second principal surface facing the first principal surface in a height direction, a first side surface, a second side surface facing the first side surface in a width direction perpendicular or substantially perpendicular to the height direction, a first end surface, and a second end surface facing the first end surface in a length direction perpendicular or substantially perpendicular to the height direction and the width direction; a plurality of first inner electrode layers alternately stacked with the plurality of dielectric layers and exposed on the first end surface; a plurality of second inner electrode layers alternately stacked with the plurality of dielectric layers and exposed on the second end surface; a first outer electrode connected to the first inner electrode layers and disposed on the first end surface; and a second outer electrode connected to the second inner electrode layers and disposed on the second end surface; wherein the first outer electrode includes a first resin outer electrode layer containing a thermosetting resin and a conductive filler, and a first base electrode layer containing glass and a conductive metal; the second outer electrode includes a second resin outer electrode layer containing a thermosetting resin and a conductive filler, and a second base electrode layer containing glass and a conductive metal; the first resin outer electrode layer directly covers about one half of the first end surface; the second resin outer electrode layer directly covers one half of the second end surface; the first base electrode layer directly covers about another half of the first end surface; and the second base electrode layer directly covers about another half of the second end surface; and a circuit board on which the multilayer ceramic capacitor is mounted; wherein the first inner electrode layers and the second inner electrode layers are in parallel or substantially in parallel to the first side surface and the second side surface and perpendicular or substantially perpendicular to a mounting surface; the first resin outer electrode layer is disposed on a side of the mounting surface; the second resin outer electrode layer is disposed on a side of the mounting surface; the first base electrode layer is disposed opposite to the mounting surface; the second base electrode layer is disposed opposite to the mounting surface; the circuit board includes a core member and mounting lands provided on a surface of the core member; and the mounting lands are connected to the first outer electrode and the second outer electrode with a bonding material. 12. The multilayer ceramic capacitor-mounting structure according to claim 11 , wherein the first resin outer electrode layer extends f

Assignees

Inventors

Classifications

  • H01G4/2325Primary

    characterised by the material of the terminals · CPC title

  • Form of non-self-supporting electrodes · CPC title

  • the terminals being coated on the capacitive element (H01G4/232 takes precedence) · CPC title

  • H01G4/30Primary

    Stacked capacitors (H01G4/33 takes precedence) · CPC title

  • electrically connecting two or more layers of a stacked or rolled capacitor · CPC title

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What does patent US10879004B2 cover?
A multilayer ceramic capacitor includes a multilayer body which includes stacked dielectric layers, first and second principal surfaces facing each other, first and second end surfaces facing each other, first inner electrode layers alternately stacked with the dielectric layers and exposed on the first end surface, second inner electrode layers alternately stacked with the dielectric layers an…
Who is the assignee on this patent?
Murata Manufacturing Co
What technology area does this patent fall under?
Primary CPC classification H01G4/2325. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 29 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).