Array substrate and manufacturing method thereof, and display device

Patent metadata

Field	Value
Publication number	US-10871685-B2
Application number	US-201816335995-A
Country	US
Kind code	B2
Filing date	May 23, 2018
Priority date	Aug 31, 2017
Publication date	Dec 22, 2020
Grant date	Dec 22, 2020

Abstract

An array substrate, a manufacturing method thereof and a display device are provided. The array substrate includes: a base substrate, a reflection region layered structure and a reflection electrode. The base substrate includes a pixel region, the pixel region includes a reflection region. The reflection region layered structure is in the reflection region, and includes a particle layer, the particle layer is configured to provide a granular rough surface on a side of the reflection region layered structure facing away from the base substrate. The reflection electrode is on the particle layer.

First claim

What is claimed is:

1. An array substrate, comprising:
a base substrate comprising a pixel region, the pixel region comprising a reflection region;
a reflection region layered structure in the reflection region, the reflection region layered structure comprising a particle layer, the particle layer being configured to provide a granular rough surface on a side of the reflection region layered structure facing away from the base substrate; and
a reflection electrode on the particle layer,
wherein the reflection region layered structure further comprises a base portion, and the particle layer is on a side of the base portion facing away from the base substrate and is in contact with the base portion, and
wherein a material of the base portion comprises a conductive material or a semiconductor material.

2. The array substrate according to claim 1 , wherein the material of the base portion comprises a metal oxide, and a material of the particle layer comprises a metal.

3. The array substrate according to claim 2 , wherein the metal oxide comprises one selected from the group consisting of indium tin oxide (ITO) and indium gallium zinc oxide (IGZO).

4. The array substrate according to claim 2 , wherein the pixel region further comprises a transmission region, the transmission region comprises a transmission electrode, and the reflection region layered structure and the transmission electrode are in a same layer.

5. The array substrate according to claim 2 , further comprising a thin film transistor, wherein the thin film transistor comprises a semiconductor active layer and a source-drain electrode layer, the reflection region layered structure and the semiconductor active layer are in a same layer, the reflection electrode and the source-drain electrode layer are in a same layer.

6. The array substrate according to claim 2 , further comprises a thin film transistor, wherein the thin film transistor comprises a semiconductor active layer and a source-drain electrode layer, and the source-drain electrode layer comprises a source electrode and a drain electrode,
wherein the pixel region further comprises a transmission region, the transmission region comprises a transmission electrode, the transmission electrode is connected with the drain electrode, a material of the base portion and a material of the transmission electrode comprise a same metal oxide, and the base portion and the transmission electrode are of an integral structure.

7. The array substrate according to claim 2 , further comprises a thin film transistor, wherein the thin film transistor comprises a gate electrode, a gate insulation layer, a semiconductor active layer and a source-drain electrode layer in sequence, the semiconductor active layer and the base portion are in contact with a same surface of the gate insulation layer, a material of the base portion and a material of the semiconductor active layer are a same semiconductor material, the source-drain electrode layer and the reflection electrode are on the semiconductor active layer and the reflection region layered structure, respectively, and a material of the source-drain electrode layer and a material of the reflection electrode are a same conductive material.

8. The array substrate according to claim 1 , wherein a size of a particle in the particle layer is less than or equal to 100 nm.

9. A display device comprising the array substrate according to claim 1 .

10. A manufacturing method of an array substrate, comprising:
forming a reflection region film on a base substrate, the base substrate comprising a pixel region, the pixel region comprising a reflection region, the reflection region film being formed in the reflection region;
roughening a surface of the reflection region film facing away from the base substrate to form a reflection region layered structure, the reflection region layered structure comprising a particle layer; and
forming a reflection electrode on the particle layer,
wherein the reflection region layered structure further comprises a base portion, and the particle layer is on a side of the base portion facing away from the base substrate and is in contact with the base portion, and
wherein a material of the base portion comprises a conductive material or a semiconductor material.

11. The manufacturing method according to claim 10 , wherein roughening the surface of the reflection region film facing away from the base substrate comprises:
performing a reduction treatment on the reflection region film to allow metal oxide contained in the surface of the reflection region film to be reduced into metal particles, the particle layer being configured to provide a granular rough surface on a side of the reflection region film facing away from the base substrate.

12. The manufacturing method according to claim 11 , wherein the reduction treatment is performed on the reflection region film with a plasma.

13. The manufacturing method according to claim 12 , wherein the plasma is a reductive plasma, and the reductive plasma comprises at least one selected from the group consisting of a hydrogen plasma and an ammonia plasma.

14. The manufacturing method according to claim 10 , wherein the pixel region further comprises a transmission region, the transmission region comprises a transmission electrode, and the reflection region film and the transmission electrode are formed of a same film by a same patterning process.

15. A manufacturing method of an array substrate, comprising:
forming a reflection region film on a base substrate, the base substrate comprising a pixel region, the pixel region comprising a reflection region, the reflection region film being formed in the reflection region;
roughening a surface of the reflection region film facing away from the base substrate to form a particle layer; and
forming a reflection electrode on the particle layer, wherein the manufacturing method further comprises:
forming a thin film transistor, wherein the thin film transistor comprises a semiconductor active layer and a source-drain electrode layer, the reflection region film and the semiconductor active layer are formed of a same film by a same patterning process, the reflection electrode and the source-drain electrode layer are formed of a same film by a same patterning process.

Assignees

• Hefei Xinsheng Optoelectronics Technology Co Ltd
• Boe Technology Group Co Ltd

Inventors

• Cao Binbin
• Ai Li
• Zhang Hui

Classifications

• H10D86/0212

  comprising manufacture, treatment or coating of substrates · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D86/40 Primary

  characterised by multiple TFTs · CPC title

• H10D86/00

  Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates · CPC title

• H10F77/707

  of the substrates or of layers on substrates, e.g. textured ITO layer on a glass substrate · CPC title