Error correction code (ECC) and data bus inversion (DBI) encoding

Patent metadata

Field	Value
Publication number	US-10862622-B2
Application number	US-201916420504-A
Country	US
Kind code	B2
Filing date	May 23, 2019
Priority date	May 23, 2019
Publication date	Dec 8, 2020
Grant date	Dec 8, 2020

Abstract

Embodiments may relate to a processor to an electronic device that includes an error correction code (ECC) encoder that is to perform ECC encoding on aa data message to generate an ECC encoded data message. The electronic device may further include a data bus inversion (DBI) encoder communicatively coupled with the ECC encoder, wherein the DBI encoder is to perform DBI encoding on the ECC encoded data message to generate a DBI encoded data message. Other embodiments may be described or claimed.

First claim

The invention claimed is:

1. An electronic device comprising:
a processor to generate a data message;
an error correction code (ECC) encoder communicatively coupled with the processor, wherein the ECC encoder is to perform ECC encoding on the data message to generate an ECC encoded data message; and
a data bus inversion (DBI) encoder communicatively coupled with the ECC encoder, wherein the DBI encoder is to perform DBI encoding on the ECC encoded data message to generate a DBI encoded data message.

2. The electronic device of claim 1 , wherein the DBI encoder is to perform DBI encoding on a portion of the ECC encoded data message that is less than the ECC encoded data message.

3. The electronic device of claim 1 , wherein the DBI encoded data message is a first DBI encoded data message, and wherein the electronic device further comprises an ECC decoder communicatively coupled with the DBI encoder;
wherein the ECC decoder is to perform ECC decoding on a second DBI encoded data message to generate an ECC decoded message; and
wherein the second DBI encoded data message is related to the first DBI encoded data message.

4. The electronic device of claim 3 , wherein the second DBI encoded data message is the same as the first DBI encoded data message.

5. The electronic device of claim 3 , wherein the second DBI encoded data message is based on DBI encoding of the first DBI encoded data message.

6. The electronic device of claim 5 , wherein the DBI encoding of the first DBI encoded data message and the second DBI encoded data message is performed without an intermediate ECC encoding or decoding.

7. The electronic device of claim 3 , further comprising a DBI decoder communicatively coupled with the ECC decoder, wherein the DBI decoder is to perform DBI decoding on the ECC decoded message to generate the data message.

8. The electronic device of claim 1 , wherein the DBI encoding is based on use of a G matrix wherein each row of the G matrix sums to 0.

9. The electronic device of claim 1 , wherein the ECC encoder is to perform the ECC encoding in accordance with a single-error correcting (SEC) algorithm.

10. A method of data transfer, the method comprising:
identifying, at an encoder, a data message;
performing, by the encoder, error correction coding (ECC) encoding of the data message to generate an ECC encoded data message;
performing, by the encoder, data bus inversion (DBI) encoding on the ECC encoded data message to generate a DBI encoded data message; and
outputting, by the encoder, the DBI encoded data message.

11. The method of claim 10 , wherein the DBI encoding is based on use of a G matrix with a property that each row of the G matrix sums to 0.

12. The method of claim 11 , further comprising generating the G matrix.

13. The method of claim 10 , further comprising:
identifying n subsets of data of the ECC encoded data message; and
performing the DBI encoding on respective ones of the subsets of data of the ECC encoded data message to generate n subsets of the DBI encoded data message.

14. The method of claim 13 , wherein a subset of the DBI encoded data message includes k bits of data and 1 bit of DBI data.

15. The method of claim 14 , wherein a length of the DBI encoded data message is (k+1)*n.

16. One or more non-transitory computer-readable media comprising instructions that, when executed by a processor of a computing device, are to cause a decoder of the computing device to:
identify a data bus inversion (DBI) encoded data message, wherein the DBI encoded data message is based on application of DBI encoding to a message encoded by error correction coding (ECC) encoding;
perform ECC decoding on the DBI encoded data message to generate an ECC decoded data message;
perform DBI decoding on the ECC decoded data message to generate a data message; and
output the data message.

17. The one or more non-transitory computer-readable media of claim 16 , wherein the DBI encoding is based on use of a G matrix with a property that each row of the G matrix sums to 0.

18. The one or more non-transitory computer-readable media of claim 16 , wherein the DBI encoded data message is based on multiple iterations of DBI encoding of an ECC encoded message.

19. The one or more non-transitory computer-readable media of claim 18 , wherein the multiple iterations of DBI encoding are performed without further iterations of ECC encoding or ECC decoding.

20. The one or more non-transitory computer-readable media of claim 16 , wherein the DBI encoding is performed on portions of a message generated by the ECC encoding.

Assignees

• Intel Corp

Inventors

• Kozhikkottu Vivek Joy
• Ramasubramanian Shankar Ganesh
• Somasekhar Dinesh
• Dadual Melin

Classifications

• H04L1/0041 Primary

  Arrangements at the transmitter end · CPC title

• H03M5/14

  Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code · CPC title

• H03M13/19

  Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes · CPC title

• H03M7/14

  Conversion to or from non-weighted codes · CPC title

• H04L2001/0094

  Bus · CPC title