Methods for defect validation

US10859926B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10859926-B2
Application numberUS-201615580515-A
CountryUS
Kind codeB2
Filing dateMay 25, 2016
Priority dateJun 16, 2015
Publication dateDec 8, 2020
Grant dateDec 8, 2020

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A method of defect validation for a device manufacturing process, the method including: obtaining a first image of a pattern processed into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining from the first image and the metrology image whether the area contains a defect, based on one or more classification criteria.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method of defect validation for a device manufacturing process, the method comprising: obtaining a first image of a pattern as processed, or expected to be processed, into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining, by a hardware computer system and based on one or more classification criteria, from the first image and the metrology image whether the area on the substrate contains a defect, wherein: the one or more classification criteria are evaluated by the hardware computer system to determine whether the area contains a defect, and the one or more classification criteria are computer determined from evaluation of a simulation of the processing of the pattern using the device manufacturing process under a first processing condition with a simulation of the processing of the pattern using the device manufacturing process under a second different processing condition. 2. The method of claim 1 , further comprising, responsive to the area containing a defect, reworking or discarding the substrate. 3. The method of claim 1 , further comprising obtaining a second image of the pattern as processed, or expected to be processed, into the area using the device manufacturing process under a second condition, and determining the one or more classification criteria at least from the first and second images. 4. The method of claim 3 , wherein the first and second images are one or more selected from a resist image, an after-etch image, and/or an after-deposition image. 5. The method of claim 3 , wherein the first image or the second image contains one or more contours. 6. The method of claim 3 , wherein the pattern processed under the first condition is not a defect and the pattern processed under the second condition is a defect. 7. The method of claim 3 , wherein the first image and/or the second image is simulated. 8. The method of claim 1 , wherein obtaining the metrology image comprises obtaining the metrology image by a scanning electron microscope or an optical imaging tool. 9. The method of claim 1 , wherein aligning the metrology image and the first image comprises matching a contour in the metrology image and a contour in the first image. 10. The method of claim 1 , further comprising identifying the area, the identifying comprising: determining a processing condition under which a pattern is or will be processed into a region on the substrate; obtaining a process window of the pattern; and responsive to the processing condition falling outside the process window, the region is identified as the area. 11. The method of claim 1 , further comprising identifying the area, the identifying comprising: simulating an image of a pattern processed, or that will be processed, into a region on the substrate; measuring one or more parameters of the image; and identifying the area based on the one or more parameters. 12. The method of claim 1 , wherein the one or more classification criteria comprise whether a difference between two images is greater than a difference between one image of the pattern processed into the area using the device manufacturing process under the first condition and another image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a difference between contours in two images is greater than a difference between contours in one image of the pattern processed into the area using the device manufacturing process under the first condition and another image of the pattern processed into the area using the device manufacturing process under a second condition, or wherein the one or more classification criteria comprise whether a classifier classifies two images into different categories. 13. The method of claim 1 , further comprising, responsive to the area containing a defect, verifying the defect. 14. A method of defect validation for a device manufacturing process, the method comprising: obtaining a first image of a pattern as processed, or expected to be processed, using a device manufacturing process under a first condition; obtaining a second image of the pattern as processed, or expected to be processed, using the device manufacturing process under a second condition, different from the first condition; determining one or more classification criteria at least from an evaluation between the first image and the second image; obtaining a metrology image from an area on a substrate, the metrology image containing the pattern; and determining, by a hardware computer system, from an image of the pattern as processed, or expected to be processed, using the device manufacturing process under the first or second condition and the metrology image whether the area contains a defect, based on the one or more classification criteria that are evaluated to determine whether the area contains a defect. 15. A computer program product comprising a non-transitory computer-readable medium having instructions recorded thereon, the instructions when executed configured to cause a computer system to at least: obtain a first image of a pattern as processed, or expected to be processed, into an area on a substrate using a device manufacturing process under a first condition; obtain a metrology image from the area; align the metrology image and the first image; and determine, based on one or more classification criteria, from the first image and the metrology image whether the area on the substrate contains a defect, wherein: the one or more classification criteria are evaluated by the computer system to determine whether the area contains a defect, and the one or more classification criteria are computer determined from evaluation of a simulation of the processing of the pattern using the device manufacturing process under a first processing condition with a simulation of the processing of the pattern using the device manufacturing process under a second different processing condition. 16. The computer program product of claim 15 , wherein the instructions are further configured to cause the computer system to obtain a second image of the pattern as processed, or expected to be processed, into the area using the device manufacturing process under a second condition, and determine the one or more classification criteria at least from the first and second images. 17. The computer program product of claim 16 , wherein the pattern processed under the first condition is not a defect and the pattern processed under the second condition is a defect. 18. The computer program product of claim 15 , wherein the instructions are further configured to identify the area and to identify the area, the instructions are further configured to cause the computer system to: determine a processing condition under which a pattern is or will be processed into a region on the substrate; obtain a process window of the pattern; and responsive to the processing condition falling outside the process window, the region is identified as the area. 19. The computer program product of claim 15 , wherein the instructions are further configured to identify the area and to identify the area, the instructions are further configured to cause the computer system to: simulate an image of a pattern processed, or that will be processed, into a region on the su

Assignees

Inventors

Classifications

  • Semiconductor; IC; Wafer · CPC title

  • using an image reference approach · CPC title

  • Transformations for image registration, e.g. adjusting or mapping for alignment of images · CPC title

  • Attenuating PSM [att-PSM], e.g. halftone PSM or PSM having semi-transparent phase shift portion,; Preparation thereof · CPC title

  • Information management, e.g. software; Active and passive control, e.g. details of controlling exposure processes or exposure tool monitoring processes · CPC title

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What does patent US10859926B2 cover?
A method of defect validation for a device manufacturing process, the method including: obtaining a first image of a pattern processed into an area on a substrate using the device manufacturing process under a first condition; obtaining a metrology image from the area; aligning the metrology image and the first image; and determining from the first image and the metrology image whether the area…
Who is the assignee on this patent?
Asml Netherlands Bv
What technology area does this patent fall under?
Primary CPC classification G03F7/7065. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 08 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).