Trapezoidal CMP groove pattern

Patent metadata

Field	Value
Publication number	US-10857648-B2
Application number	US-201715725987-A
Country	US
Kind code	B2
Filing date	Oct 5, 2017
Priority date	Jun 14, 2017
Publication date	Dec 8, 2020
Grant date	Dec 8, 2020

Abstract

The polishing pad is suitable for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates. The polishing pad includes a polishing layer having a polymeric matrix and radial feeder grooves in the polishing layer separating the polishing layer into polishing regions. The radial feeder grooves extend at least from a location adjacent the center to a location adjacent the outer edge of the polishing pad. Each polishing region includes a series of spaced non-isosceles trapezoid groove structures having parallel base segments connecting two adjacent radial feeder grooves to form leg segments. The series of non-isosceles trapezoid groove structures extend from adjacent the outer edge toward the center of the polishing pad with the perimeter of the series of trapezoid structures also being a trapezoid.

First claim

We claim:

1. A polishing pad suitable for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates, the polishing pad comprising the following:
a polishing layer having a polymeric matrix and a thickness, the polishing layer including a center, an outer edge and a radius extending from the center to the outer edge of the polishing pad and wherein the polishing layer is configured for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates, including atomic scale polishing for removing a single monatomic layer at a time and wherein the polishing pad is a polyurethane CMP polishing pad;
radial feeder grooves in the polishing layer separating the polishing layer into polishing regions, the radial feeder grooves extending at least from a location adjacent the center to a location adjacent the outer edge of the polishing pad, the polishing regions having a series of biased grooves with a bias for adjusting residence time under the wafer, the bias having a bias angle θ between a bisect line bisecting polishing regions and the biased grooves connecting adjacent feeder grooves, the bias angle θ being either an inward bias angle θ sloped inward toward the center of the polishing pad or an outward bias angle θ sloped outward toward the outer edge of the polishing pad, a majority of the biased grooves sweeping under the wafer in the same direction for cumulative improving of removal rate; and
each polishing region including a series of spaced non-isosceles trapezoid groove structures, the trapezoid groove structures having biased grooves of parallel base segments connecting two adjacent radial feeder grooves to form leg segments, the base segments intersecting each of the leg segments at different angles, the series of non-isosceles trapezoid groove structures extending from adjacent the outer edge toward the center of the polishing pad with the perimeter of the series of trapezoid structures also being a trapezoid wherein the rotation of the polishing pad moves polishing fluid through a majority of the base segments and the leg segments toward the outer edge of the polishing pad and away from the wafer depending upon inward bias or outward bias and direction of rotation of the polishing pad for increasing residence time of polishing fluid under the wafer with outward flow of the polishing fluid in the series of biased grooves in the circular sectors and wherein non-alignment of base segments between adjacent polishing regions facilitates polishing fluid flow down the radial feeder grooves for improved slurry distribution.

2. The polishing pad of claim 1 wherein all polishing regions have the same bias.

3. The polishing pad of claim 1 including an inward bias for increasing polishing fluid residence time under a wafer during counterclockwise rotation of the polishing pad and the wafer.

4. The polishing pad of claim 1 wherein the polishing pad includes at least three radial feeder grooves.

5. The polishing pad of claim 1 wherein the series of spaced non-isosceles trapezoid groove structures connecting a pair of adjacent radial feeder grooves are parallel linear grooves.

6. The polishing pad of claim 1 wherein the parallel base segments step down into the radial feeder grooves.

7. A polishing pad suitable for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates, the polishing pad comprising the following:
a polishing layer having a polymeric matrix and a thickness, the polishing layer including a center, an outer edge and a radius extending from the center to the outer edge of the polishing pad and wherein the polishing layer is configured for polishing or planarizing a wafer of at least one of semiconductor, optical and magnetic substrates, including atomic scale polishing for removing a single monatomic layer at a time and wherein the polishing pad is a polyurethane CMP polishing pad;
radial feeder grooves in the polishing layer separating the polishing layer into polishing regions, the polishing regions being circular sectors defined by two adjacent radial feeder grooves, a bisect line connecting the center to a midpoint of the perimeter arc bisecting the polishing regions, the radial feeder grooves extending at least from a location adjacent the center to a location adjacent the outer edge of the polishing pad, a majority of the polishing regions having a series of biased grooves with a bias for adjusting residence time under the wafer, the bias having a bias angle θ between a bisect line bisecting polishing regions and the biased grooves connecting adjacent feeder grooves, the bias angle θ being either an inward bias angle θ sloped inward toward the center of the polishing pad or an outward bias angle θ sloped outward toward the outer edge of the polishing pad, a majority of the biased grooves sweeping under the wafer in the same direction for cumulative improving of removal rate; and
each polishing region including a series of spaced non-isosceles trapezoid groove structures, the trapezoid groove structures having biased grooves of parallel base segments connecting two adjacent radial feeder grooves to form leg segments, the base segments intersecting each of the leg segments at different angles, the series of non-isosceles trapezoid groove structures extending from adjacent the outer edge toward the center of the polishing pad with the perimeter of the series of trapezoid structures also being a trapezoid wherein the rotation of the polishing pad moves polishing fluid through a majority of the base segments and the leg segments toward the outer edge of the polishing pad and away from the wafer depending upon inward bias at an angle of 20° to 85° from the bisect line or outward bias at an angle of 95° to 160° from the bisect line and direction of rotation of the polishing pad for increasing residence time of polishing fluid under the wafer with outward flow of the polishing fluid in the base segments in the circular sectors and wherein non-alignment of base segments between adjacent polishing regions facilitates polishing fluid flow down the radial feeder grooves for improved slurry distribution.

8. The polishing pad of claim 7 wherein all polishing regions have the same bias.

9. The polishing pad of claim 7 including an inward bias for increasing polishing fluid residence time under a wafer during counterclockwise rotation of the polishing pad and the wafer.

10. The polishing pad of claim 7 wherein the polishing pad includes at least three radial feeder grooves.

11. The polishing pad of claim 7 wherein the series of spaced non-isosceles trapezoid groove structures connecting a pair of adjacent radial feeder grooves are parallel linear grooves.

12. The polishing pad of claim 7 wherein the parallel base segments step down into the radial feeder grooves.

Assignees

• Rohm & Haas Elect Materials Cmp Holdings Inc
• Rohm And Haas Electronic Mat Cmp Holdings

Inventors

• Nguyen John Vu
• Tran Tony Quan
• Hendron Jeffrey James
• Stack Jeffrey Robert

Classifications

• H10P52/402

  of semiconductor materials · CPC title

• B24B37/26 Primary

  characterised by the shape of the lapping pad surface, e.g. grooved · CPC title

• H01L21/30625

  Electricity · mapped topic

• H10W20/062

  by smoothing of conductive parts, e.g. by planarisation · CPC title

• H10W20/092

  by smoothing the dielectric parts · CPC title