Apparatus for testing electronic devices

US10852347B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10852347-B2
Application numberUS-201816121192-A
CountryUS
Kind codeB2
Filing dateSep 4, 2018
Priority dateApr 27, 2005
Publication dateDec 1, 2020
Grant dateDec 1, 2020

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  1. Title

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  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide a dense configuration. The interfaces are connected through flexible attachments to an array of first connector modules. Each one of the first connector modules can be independently connected to a respective one of a plurality of second connector modules, thereby reducing stresses on a frame of the apparatus. Further features include for example a piston that allows for tight control of forces exerted by terminals onto contacts of a wafer.

First claim

Opening claim text (preview).

What is claimed: 1. An apparatus for testing a device having an integrated circuit, comprising: a frame including a base portion, and test head and thermal system portions secured to the base portion; a holder secured to the base portion, the holder being capable of holding the device; a test head mounted to the test head portion in a position such that electric signals can be sent through the test head to the integrated circuit of the device; and a thermal system located in a position to cool components of the test head, and being mounted through the thermal system portion to the base portion without being mounted to the test head portion. 2. The apparatus of claim 1 , wherein the test head includes a test head support structure, a plurality of electric components mounted to the test head support structure, and a panel that forms a passage through which air can flow before flowing over the electric components. 3. The apparatus of claim 2 , wherein the electric components are boards, the test head support structure having a plurality of slots that hold the boards. 4. The apparatus of claim 2 , wherein the thermal system includes a shell through which the air can flow and at least one heat dissipation device in the shell, the shell forming an interface with the panel, with a gap being defined between the shell and the panel. 5. The apparatus of claim 4 , wherein the heat dissipation device includes a plurality of fins over which the air flows. 6. The apparatus of claim 4 , wherein the thermal system includes a fan that moves the air through the shell. 7. The apparatus of claim 6 , wherein the thermal system includes a variable frequency drive to vary the speed of the fan. 8. The apparatus of claim 7 , wherein the thermal system includes a thermocouple in the test head portion, and wherein the variable frequency drive varies the speed of the fan in accordance with a measurement of the thermocouple. 9. The apparatus of claim 1 , wherein the thermal system portion and the test head portion are mounted for pivotal movement relative to one another. 10. The apparatus of claim 1 , wherein the test head portion and thermal system portion are mounted on separate sets of arms. 11. The apparatus of claim 1 , wherein the test head portion and the thermal system portion are mechanically decoupled. 12. An apparatus for testing a device having an integrated circuit, comprising: a base portion; a holder for the device mounted to the base portion; a test head portion and a thermal system portion mounted to the base portion; a test head mounted to the test head portion, the test head including a test head support structure, a plurality of electric components mounted to the test head support structure, and a panel that forms a passage through which air can flow before flowing over the electric components; and a thermal system mounted through the thermal system frame to the base portion, the thermal system including a shell through which the air can flow and at least one heat dissipation device in the shell, the shell forming an interface with the panel, with a gap being defined between the shell and the panel without being mounted to the test head portion. 13. The apparatus of claim 12 , wherein the electric components are boards, the test head support structure having a plurality of slots that hold the boards, and the thermal system includes a fan that moves the air through the shell. 14. The apparatus of claim 13 , wherein the thermal system portion and the test head portion are mounted for pivotal movement relative to one another.

Assignees

Inventors

Classifications

  • H10P74/00Primary

    Testing or measuring during manufacture or treatment of wafers, substrates or devices · CPC title

  • Complete testing stations; systems; procedures; software aspects · CPC title

  • Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests · CPC title

  • related to cooling · CPC title

  • related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation · CPC title

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Frequently asked questions

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What does patent US10852347B2 cover?
An apparatus is described for burn-in and/or functional testing of microelectronic circuits of unsingulated wafers. A large number of power, ground, and signal connections can be made to a large number of contacts on a wafer. The apparatus has a cartridge that allows for fanning-in of electric paths. A distribution board has a plurality of interfaces that are strategically positioned to provide…
Who is the assignee on this patent?
Aehr Test Systems
What technology area does this patent fall under?
Primary CPC classification H10P74/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 01 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).