Wafer level shim processing

Patent metadata

Field	Value
Publication number	US-10847569-B2
Application number	US-201916285690-A
Country	US
Kind code	B2
Filing date	Feb 26, 2019
Priority date	Feb 26, 2019
Publication date	Nov 24, 2020
Grant date	Nov 24, 2020

Abstract

Methods and apparatus for proving a sensor assembly. Embodiments can include employing a circuit assembly having a first layer bonded to a second layer with an oxide layer, depositing bonding oxide on the second layer of the circuit assembly, and thinning the first layer of the circuit assembly after depositing the bonding oxide. A coating can be applied over at least a portion of the first layer of the circuit assembly after annealing the circuit assembly. After polishing the bonding oxide on the second surface of the second layer of the circuit assembly, a shim can be secured to the bonding oxide on the second surface of the second layer of the circuit assembly to reduce bow of the assembly. Embodiments can provide a sensor useful in focal plane arrays.

First claim

What is claimed is:

1. A method, comprising:
deploying a circuit assembly having a first wafer bonded to a second wafer with an oxide layer, wherein a first surface of the first wafer is bonded to a first surface of the second wafer;
creating a bonding oxide on a second surface of the second wafer;
thinning the first wafer after depositing the bonding oxide;
annealing the circuit assembly;
applying a coating over at least a portion of the first wafer after annealing the circuit assembly;
polishing the bonding oxide on the second surface of the second wafer;
securing a shim to the bonding oxide on the second surface of the second wafer to reduce bow of the circuit assembly; and
removing the coating.

2. The method according to claim 1 , wherein the circuit assembly comprises a sensor circuit assembly with interconnection embedded in the bond interface.

3. The method according to claim 1 , wherein the first wafer comprises a detector.

4. The method according to claim 3 , wherein the second wafer comprises a read out integrated circuit (ROIC).

5. The method according to claim 4 , wherein the circuit assembly provides a sensor for a focal plane array.

6. The method according to claim 1 , wherein the circuit assembly does not comprise epoxy.

7. The method according to claim 1 , further including applying photoresist material to the first wafer prior to bonding the shim.

8. The method according to claim 7 , further including applying a non-photosensitive material to the first wafer prior to bonding the shim.

9. The method according to claim 7 , further including removing the photoresist material prior to annealing the circuit assembly.

10. The method according to claim 8 , further including removing the non-photosensitive material prior to annealing the circuit assembly.

11. The method according to claim 1 , wherein the bonding oxide bonding oxide has a uniformity of about 5000±500 Å.

12. The method according to claim 1 , wherein the shim comprises a material selected from the group consisting of Silicon, AlN, and sapphire.

13. An integrated circuit fabricated in accordance with claim 1 .

Assignees

• Raytheon Co

Inventors

• Burkhart Jeffery H
• Kilcoyne Sean P
• Miller Eric

Classifications

• H10W42/121

  protecting against mechanical damage (H10W76/00, H10W74/00 take precedence) · CPC title

• H10F39/809

  of hybrid image sensors · CPC title

• H10F39/1843

  of the hybrid type · CPC title

• H10F39/018 Primary

  of hybrid image sensors · CPC title

• B81C2203/036

  Fusion bonding · CPC title