Micro-LED module and method for fabricating the same

US10847504B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10847504-B2
Application numberUS-201916394121-A
CountryUS
Kind codeB2
Filing dateApr 25, 2019
Priority dateFeb 10, 2017
Publication dateNov 24, 2020
Grant dateNov 24, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for fabricating a micro-LED module is disclosed. The method includes: preparing a micro-LED including a plurality of electrode pads and a plurality of LED cells; preparing a submount substrate including a plurality of electrodes corresponding to the plurality of electrode pads; and flip-bonding the micro-LED to the submount substrate through a plurality of solders located between the plurality of electrode pads and the plurality of electrodes. The flip-bonding includes heating the plurality of solders by a laser.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for flip-bonding a micro-LED to a submount substrate, comprising: forming a plurality of LED cells on an LED substrate to prepare the micro-LED; preparing the submount substrate having a coefficient of thermal expansion different from that of the micro-LED; and flip-bonding the micro-LED to the submount substrate through solders located therebetween, wherein the submount substrate and the micro-LED are controlled to different temperatures corresponding to different heating-cooling curves during the flip-bonding such that a difference in strain caused by the different coefficients of thermal expansion of the LED substrate and the submount substrate is suppressed. 2. The method according to claim 1 , wherein the submount substrate and the micro-LED are controlled to different temperatures in a heating zone, a holding zone, and a cooling zone during the flip-bonding. 3. The method according to claim 2 , wherein, in the heating zone, the LED substrate is heated from room temperature to a first holding temperature along a first heating slope and the submount substrate is heated from room temperature to a second holding temperature higher than the first holding temperature along a second heating slope steeper than the first heating slope. 4. The method according to claim 2 , wherein, in the holding zone, the LED substrate is maintained at the first holding temperature for an indicated time and the submount substrate is maintained at the second holding temperature for an indicated time. 5. The method according to claim 2 , wherein, in the cooling zone, the LED substrate is cooled from the first holding temperature to room temperature and the submount substrate is cooled from the second holding temperature to room temperature. 6. The method according to claim 2 , wherein, in the cooling zone, the time when the cooling of the LED substrate is completed is different from the time when the cooling of the submount substrate is completed. 7. The method according to claim 2 , wherein, in the cooling zone, the cooling slope of the LED substrate is the same as that of the submount substrate. 8. The method according to claim 1 , wherein the temperature of the LED substrate is controlled by a temperature control unit mounted on a chuck to fix the micro-LED during the flip-bonding. 9. The method according to claim 1 , wherein the temperature of the submount substrate is controlled by a temperature control unit mounted on a chuck to fix the submount substrate during the flip-bonding. 10. The method according to claim 1 , wherein the LED substrate is a sapphire substrate and each of the LED cells is formed by etching an epitaxial layer comprising an n-type semiconductor layer, an active layer, and a p-type semiconductor layer grown on the sapphire substrate. 11. The method according to claim 1 , wherein the submount substrate comprises a Si-based substrate material, a plurality of CMOS cells formed on the Si-based substrate material so as to correspond to the plurality of LED cells, and a plurality of electrodes connected to the plurality of CMOS cells. 12. The method according to claim 1 , wherein each of the LED cells comprises an n-type semiconductor layer, an active layer, and a p-type semiconductor layer and the micro-LED is prepared by arranging the plurality of LED cells in a matrix on an exposed area of the n-type semiconductor layer on the LED substrate. 13. The method according to claim 12 , wherein the micro-LED is prepared by disposing an n-type electrode pad on the exposed area of the n-type semiconductor layer and disposing a p-type electrode pad on each of the p-type semiconductor layers of the LED cells. 14. The method according to claim 13 , wherein the flip-bonding comprises connecting the plurality of p-type electrode pads and the n-type electrode pad to a plurality of individual electrodes and a common electrode disposed on the submount substrate through a plurality of solders, respectively. 15. The method according to claim 13 , wherein the preparation of the micro-LED comprises forming a passivation layer so as to cover the plurality of LED cells and the exposed area of the n-type semiconductor layer and forming holes through which the plurality of p-type electrode pads are exposed and a hole through which the n-type electrode pad is exposed.

Assignees

Inventors

Classifications

  • between stacked chips · CPC title

  • Soldering or alloying · CPC title

  • Applying EM radiation, e.g. induction heating or using a laser · CPC title

  • in gaseous form, e.g. by CVD or PVD · CPC title

  • Cleaning, e.g. oxide removal or de-smearing · CPC title

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Frequently asked questions

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What does patent US10847504B2 cover?
A method for fabricating a micro-LED module is disclosed. The method includes: preparing a micro-LED including a plurality of electrode pads and a plurality of LED cells; preparing a submount substrate including a plurality of electrodes corresponding to the plurality of electrode pads; and flip-bonding the micro-LED to the submount substrate through a plurality of solders located between the p…
Who is the assignee on this patent?
Lumens Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 24 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).