Charge pump for use in non-volatile flash memory devices

Patent metadata

Field	Value
Publication number	US-10847227-B2
Application number	US-201816219424-A
Country	US
Kind code	B2
Filing date	Dec 13, 2018
Priority date	Oct 16, 2018
Publication date	Nov 24, 2020
Grant date	Nov 24, 2020

Abstract

Numerous embodiments of an improved charge pump design are disclosed for generating the high voltages necessary to perform erase and program operations in non-volatile flash memory devices. In these embodiments, each boost stage in the charge pump is modified to overcome a deficiency in prior art charge pumps whereby voltage actually would decrease in the final boost stage. These modifications include the addition of one or more of a clock doubling circuit, a local self-precharge circuit, a feed-forward precharge circuit, a feed-backward precharge circuit, and a hybrid circuit comprising NMOS and PMOS transistors and diodes.

First claim

What is claimed is:

1. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.

2. The charge pump of claim 1 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.

3. The charge pump of claim 1 , wherein each of the plurality of boost stages further comprises:
a transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output node.

4. The charge pump of claim 3 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.

5. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a diode comprising a first terminal coupled to the input node and a second terminal coupled to the output node.
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.

6. The charge pump of claim 5 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.

7. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a local precharge device comprising a first terminal coupled to another boost stage in the plurality of boost stages or to a voltage source and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.

8. The charge pump of claim 7 , wherein the local precharge device is a Schottky diode or a p/n junction diode.

9. The charge pump of claim 7 , wherein the local precharge device is a diode-connected transistor.

10. The charge pump of claim 7 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.

11. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a diode comprising a first terminal coupled to the input node and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.

12. The charge pump of claim 11 , further comprising:
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node.

13. The charge pump of claim 11 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.

14. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising:
a clock doubling circuit for receiving a first clock signal and generating a second clock signal, wherein the second clock signal has the same frequency and phase as the first cloc

Assignees

• Silicon Storage Tech Inc

Inventors

• Tran Hieu Van
• Ly Anh
• Vu Thuan
• Nguyen Kha
• Pham Hien
• Hong Stanley
• Trinh Stephen T

Classifications

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G11C16/0425

  comprising cells containing a merged floating gate and select transistor · CPC title

• G11C16/32

  Timing circuits · CPC title

• G11C7/222

  Clock generating, synchronizing or distributing circuits within memory device · CPC title

• G11C16/30 Primary

  Power supply circuits · CPC title