System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits

US10833243B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-10833243-B1
Application numberUS-201715679789-A
CountryUS
Kind codeB1
Filing dateAug 17, 2017
Priority dateJan 8, 2010
Publication dateNov 10, 2020
Grant dateNov 10, 2020

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  5. First independent claim

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Abstract

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Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two or more different metals. Such a multi-metallic wiring layer may offer improved resistance to impurity diffusion, better surface passivation, and/or reduction of stress, beyond that which is attainable with a single-metallic wiring layer. The resulting process leads to improved margin and yield in an integrated circuit comprising a plurality of Josephson junctions. Several preferred embodiments are disclosed, for both planarized and non-planarized processes. These preferred and other methods may be applied to digital circuits based on Rapid Single Flux Quantum logic, and to quantum computing using Josephson junction qubits.

First claim

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What is claimed is: 1. A superconducting integrated circuit, comprising: a Josephson junction trilayer having a hydrogen-sensitive barrier layer disposed between two superconducting layers and forming at least one Josephson junction switching device; an induced superconductivity hydrogen-diffusion barrier layer on at least one surface of the Josephson junction trilayer; and a planarized hydrogen-permeable superconducting connection layer, electrically connected through the hydrogen-diffusion barrier layer to one of the two superconducting layers. 2. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer is patterned together with at least one of the two superconducting layers of the Josephson junction trilayer in a common photolithographic mask step to form the at least one Josephson junction switching device. 3. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer has a hydrogen diffusion coefficient which is different from the two superconducting layers and the superconductor connection layer. 4. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer acts as a hydrogen sink. 5. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer acts as a hydrogen getter. 6. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer chemically reacts with hydrogen. 7. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer is an etch stop layer. 8. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer is formed from a material selected from the group consisting of aluminum oxide, aluminum nitride, magnesium oxide, doped silicon, doped germanium, doped gallium nitride, and a transition metal silicide. 9. The superconducting integrated circuit according to claim 1 , wherein the hydrogen-diffusion barrier layer is formed of a material having at least one chemical characteristic different from each of the upper superconducting layer and the superconducting connection layer, selected from the group consisting of etch susceptibility, hydrogen diffusion coefficient, hydrogen affinity, hydrogen permeability, hydrogen solubility, and hydrogen reactivity. 10. The superconducting integrated circuit according to claim 1 , wherein the at least one Josephson junction switching device is part of a quantum computing element. 11. A method of forming a superconducting integrated circuit, comprising: forming a Josephson junction trilayer having a hydrogen-sensitive barrier layer disposed between two hydrogen permeable superconducting layers on a substrate; forming an induced superconductivity a hydrogen-diffusion barrier layer on an upper surface of the Josephson junction trilayer adjacent to an upper superconducting layer; patterning at least the upper superconducting layer together with the hydrogen-diffusion barrier layer to form at least one Josephson junction switching device; depositing a hydrogen permeable superconducting connection layer on the hydrogen-diffusion barrier layer; and patterning and planarizing the deposited hydrogen permeable superconducting connection layer. 12. The method according to claim 11 , further comprising cooling the superconducting integrated circuit to the cryogenic operating temperature and causing the at least one Josephson junction switching device to switch. 13. The method according to claim 11 , wherein said patterning comprises etching, and wherein the hydrogen-diffusion barrier layer is an etch stop layer. 14. The method according to claim 11 , wherein the hydrogen-diffusion barrier layer is formed of a material having at least one chemical characteristic different from each of the upper superconducting layer and the superconducting connection layer, selected from the group consisting of etch susceptibility, hydrogen diffusion coefficient, hydrogen affinity, hydrogen permeability, hydrogen solubility, and hydrogen reactivity. 15. The method according to claim 11 , wherein the hydrogen-diffusion barrier layer acts as a hydrogen sink. 16. The method according to claim 11 , wherein the hydrogen-diffusion barrier layer acts as a hydrogen getter. 17. A superconducting integrated circuit, comprising: a Josephson junction trilayer having a hydrogen-sensitive barrier layer disposed between two hydrogen permeable superconducting layers, and forming at least one Josephson junction switching device responsive to hydrogen diffusion from the two hydrogen permeable superconducting layers to the hydrogen-sensitive barrier layer; a planarized hydrogen-permeable superconducting connection layer, electrically connected to one of the two superconducting layers; and a hydrogen-diffusion barrier layer, disposed between one of the two hydrogen permeable superconducting layers and the planarized hydrogen-permeable superconducting connection layer, configured to block diffusion of hydrogen between the one of the two hydrogen permeable superconducting layers and the planarized hydrogen-permeable superconducting connection layer, to thereby stabilize the at least one Josephson junction switching device. 18. The superconducting integrated circuit according to claim 17 , wherein the hydrogen-diffusion barrier layer is patterned together with at least one of the two superconducting layers of the Josephson junction trilayer in a common photolithographic mask step to form the at least one Josephson junction switching device, and the hydrogen-diffusion barrier layer acts as an etch stop layer. 19. The superconducting integrated circuit according to claim 17 , wherein the hydrogen permeable superconducting layers comprise niobium, and the hydrogen-diffusion barrier layer is formed from a material selected from the group consisting of aluminum oxide, aluminum nitride, magnesium oxide, doped silicon, doped germanium, doped gallium nitride, and a transition metal silicide. 20. The superconducting integrated circuit according to claim 17 , wherein the planarized hydrogen-permeable superconducting connection layer is patterned by etching in a hydrogen-generating etch process, and the hydrogen-diffusion barrier layer acts as an etch stop layer for the hydrogen-generating etch process.

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What does patent US10833243B1 cover?
Superconducting integrated circuits require several wiring layers to distribute bias and signals across the circuit, which must cross each other both with and without contacts. All wiring lines and contacts must be fully superconducting, and in the prior art each wiring layer comprises a single metallic thin film. An alternative wiring layer is disclosed that comprises sequential layers of two …
Who is the assignee on this patent?
Hypres Inc, Seeqc Inc
What technology area does this patent fall under?
Primary CPC classification H01L39/2493. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 10 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).