Display apparatus and source driver thereof and operating method

Patent metadata

Field	Value
Publication number	US-10832627-B2
Application number	US-201615209778-A
Country	US
Kind code	B2
Filing date	Jul 14, 2016
Priority date	Jul 14, 2016
Publication date	Nov 10, 2020
Grant date	Nov 10, 2020

Abstract

A display apparatus, a source driver of the display apparatus and an operating method of the source driver are provided. The display apparatus includes a display panel, at least one gate driver and a plurality of source drivers. The display panel includes a plurality of source lines and a plurality of gate lines. A plurality of output terminals of the gate driver are coupled to the gate lines in one-to-one manner. A plurality of output terminals of the source drivers are coupled to the source lines in one-to-one manner to provide a plurality of source driving voltages to the source lines. The source driving voltages include different coarse compensation voltages. The coarse compensation voltages are respectively configured based on distances between the source drivers which control the source lines and input terminals of the gate lines of the display panel.

First claim

What is claimed is:

1. A display apparatus, comprising:
a display panel, comprising a plurality of source lines and a plurality of gate lines, wherein each of the source lines is perpendicular to each of the gate lines;
at least one gate driver having a plurality of output terminals coupled to the gate lines; and
a plurality of source drivers having a plurality of output terminals coupled to the source lines to provide a plurality of source driving voltages to the source lines, wherein the plurality of source driving voltages include first coarse compensation voltages assigned by a first source driver of the plurality of source drivers, and the source driving voltages include second coarse compensation voltages assigned by a second source driver of the plurality of source drivers,
wherein each of the first coarse compensation voltages assigned by the first source driver has the same first voltage value, each of the second coarse compensation voltages assigned by the second source driver has the same second voltage value, and the first coarse compensation voltages assigned by the first source driver are different from the second coarse compensation voltages assigned by the second source driver,
wherein the first coarse compensation voltages are respectively configured based on distances between the first source driver and input terminals of the gate lines so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines controlled by the first source driver and the gate lines,
wherein the second coarse compensation voltages are respectively configured based on distances between the second source driver and input terminals of the gate lines so as to compensate for feed-through voltages induced by parasitic capacitances between the source lines controlled by the second source driver and the gate lines.

2. The display apparatus according to claim 1 , wherein one of the source drivers comprises:
a programmable gamma generating circuit, configured to use one corresponding coarse compensation voltage among the coarse compensation voltages to respectively compensate original gamma voltages so as to provide a plurality of compensated gamma voltages; and
a plurality of drive channel circuits, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages, wherein each of the drive channel circuits comprises a digital-to-analog converter and an output buffer, the digital-to-analog converter converts digital pixel data into a source driving voltage according to the compensated gamma voltages, a first input terminal of the output buffer is coupled to an output terminal of the digital-to-analog converter to receive the source driving voltage, and the output buffer is configured to output the source driving voltage to one corresponding source line among the source lines.

3. The display apparatus of claim 1 , further comprising:
a timing controller, coupled to the source drivers and the gate driver, wherein the timing controller provides different voltage setting instructions respectively to a plurality of programmable gamma generating circuits of the source drivers to set a plurality of compensated gamma voltages for each source driver, wherein the voltage setting instructions respectively determine the coarse compensation voltages.

4. The display apparatus according to claim 1 , wherein the first source driver of the plurality of source drivers comprises:
a programmable gamma generating circuit, configured to use one corresponding coarse compensation voltage among the coarse compensation voltages to respectively compensate original gamma voltages so as to provide a plurality of compensated gamma voltages; and
a plurality of drive channel circuits, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages and a plurality of fine compensation voltages, wherein a plurality of output terminals of the drive channel circuits are coupled to the source lines with respect to the first source driver to provide a plurality of compensated source driving voltages with respect to the first source driver, the compensated source driving voltages with respect to the first source driver are configured to include different fine compensation voltages which are respectively provided to the plurality of drive channel circuits, and wherein the fine compensation voltages are respectively configured based on distances between the source lines with respect to the first source driver and the input terminal of the gate lines.

5. The display apparatus according to claim 4 , wherein each of the drive channel circuits comprises:
a digital-to-analog converter, coupled to the programmable gamma generating circuit to receive the compensated gamma voltages, wherein the digital-to-analog converter converts digital pixel data into a source driving voltage according to the compensated gamma voltages; and
an output buffer having a first input terminal coupled to an output terminal of the digital-to-analog converter to receive the source driving voltage, and a second input terminal coupled to a reference voltage generating unit to receive one corresponding reference voltage among a plurality of reference voltages, and an output terminal outputting one of the compensated source driving voltages to one corresponding source line among the source lines with respect to the first source driver, wherein the plurality of reference voltages are the fine compensation voltages and the corresponding compensated source driving voltage outputted by the output buffer is the source driving voltage outputted by the digital-to-analog converter plus one corresponding fine compensation voltage among the fine compensation voltages.

6. The display apparatus according to claim 5 , wherein the output buffer comprises:
a first current source;
a first transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the first current source;
a second transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the first current source;
a second current source;
a third transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the second current source;
a fourth transistor having a control terminal coupled to the second input terminal of the output buffer, and a first terminal coupled to the second current source; and
a gain and output stage having a first differential input pair and an output terminal, wherein a first input terminal of the first differential input pair is coupled to a second terminal of the first transistor and a second terminal of the third transistor, a second input terminal of the first differential input pair is coupled to a second terminal of the second transistor and a second terminal of the fourth transistor, and the output terminal of the gain and output stage is coupled to the output terminal of the output buffer.

7. The display apparatus according to claim 6 , wherein the output buffer further comprises:
a third current source;
a fifth transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the third current source;
a sixth transistor having a control terminal coupled to the output terminal of the output buffer, and a first terminal coupled to the third current source;
a fourth current source;
a seventh transistor having a control terminal coupled to the first input terminal of the output buffer, and a first terminal coupled to the fourth current source; and
an eighth transistor having a control terminal coupled to the second input terminal of t

Assignees

• Novatek Microelectronics Corp

Inventors

• Cheng Jhih-Siou
• Liu Yi-Chuan

Classifications

• G09G2330/028

  Generation of voltages supplied to electrode drivers in a matrix display other than LCD · CPC title

• G09G2310/027

  Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters · CPC title

• G09G3/2092

  Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto (suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165) · CPC title

• G09G2300/0828

  forming a digital to analog [D/A] conversion circuit · CPC title

• G09G3/3659

  the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes · CPC title