Atomic layer deposition of lead sulfide for infrared optoelectronic devices

Patent metadata

Field	Value
Publication number	US-10826005-B2
Application number	US-201515763290-A
Country	US
Kind code	B2
Filing date	Sep 24, 2015
Priority date	Sep 24, 2015
Publication date	Nov 3, 2020
Grant date	Nov 3, 2020

Abstract

A PIN type infrared photodiode including a first electrode, a n-type semiconductor, an atomic layer deposition coating of lead sulfide, a p-type semiconductor and a second electrode, wherein the n-type semiconductor comprises nanowires conformally coated with the atomic layer deposition coating of lead sulfide.

First claim

The invention claimed is:

1. A PIN type infrared photodiode comprising:
a first electrode,
a n-type semiconductor,
an atomic layer deposition coating containing lead sulfide,
a p-type semiconductor, and
a second electrode,
wherein:
a content of the lead sulfide in the atomic layer deposition coating is at least 95 wt %, and
the n-type semiconductor comprises nanowires conformally coated with the atomic layer deposition coating.

2. The PIN type infrared photodiode according to claim 1 , wherein the nanowires comprises zinc oxide.

3. The PIN type infrared photodiode according to claim 1 , further comprising a coating of titanium dioxide interposed between the nanowires and the atomic layer deposition coating, the coating of titanium dioxide conformally coating the nanowires.

4. The PIN type infrared photodiode according to claim 1 , wherein the p-type semiconductor comprises spiro-MeOTAD.

5. The PIN type infrared photodiode according to claim 1 , wherein the first electrode comprises fluorine-doped tin oxide.

6. The PIN type infrared photodiode according to claim 1 , wherein the atomic layer deposition coating has a thickness equal to or greater than 5 nm.

7. The PIN type infrared photodiode according to claim 1 , wherein the atomic layer deposition coating has a thickness less than or equal to 40 nm.

8. A method for producing a PIN type infrared photodiode, the method comprising:
growing nanowires of a n-type semiconductor; and
conformally coating the nanowires with lead sulfide by atomic layer deposition to form an atomic layer deposition coating containing lead sulfide, wherein a content of the lead sulfide in the atomic layer deposition coating is at least 95 wt %.

9. The method according to claim 8 , further comprising:
before the nanowires are conformally coated with lead sulfide, conformally coating the nanowires with titanium dioxide by atomic layer deposition,
wherein the nanowires comprise zinc oxide.

10. The method according to claim 8 , wherein the nanowires are grown on a fluorine-doped tin oxide substrate.

11. The method according to claim 8 , wherein the lead sulfide is deposited from lead bis(2,2,6,6-tetramethyl-3,5-heptadionate) and hydrogen sulfide precursors.

12. The method according to claim 8 , wherein a number of cycles for the deposition of the lead sulfide is equal to or greater than 10 cycles.

13. The method according to claim 8 , wherein a number of cycles for the deposition of the lead sulfide is less than or equal to 110 cycles.

14. The method according to claim 8 , wherein the nanowires are grown from a liquid solution at temperature below 600° C.

Assignees

• Toyota Motor Europe
• Governing Council Univ Toronto

Inventors

• Kinge Sachin
• Xu Jixian
• Sutherland Brandon
• Hoogland Sjoerd
• Sargent Edward

Classifications

• H10K30/50

  Photovoltaic [PV] devices · CPC title

• H10K30/40

  comprising a p-i-n structure, e.g. having a perovskite absorber between p-type and n-type charge transport layers · CPC title

• H10F77/127 Primary

  comprising only Group IV-VI or only Group II-IV-VI chalcogenide materials, e.g. PbSnTe · CPC title

• H10F77/1437

  Quantum wires or nanorods · CPC title

• Y02E10/549

  Organic PV cells · CPC title