Operational amplifier and control method thereof

US10819291B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10819291-B2
Application numberUS-201916659316-A
CountryUS
Kind codeB2
Filing dateOct 21, 2019
Priority dateApr 12, 2018
Publication dateOct 27, 2020
Grant dateOct 27, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. An operational amplifier, comprising: a first amplifier stage, configured to generate a plurality of first output voltages according to a plurality of first input voltages; a second amplifier stage, coupled to the first amplifier stage, the second amplifier stage configured to generate a plurality of second output voltages according to the first output voltages; a second output stage circuit, coupled to the second amplifier stage and a first output stage circuit, the second output stage circuit configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, coupled to the second amplifier stage and the second output stage circuit, the first common-mode feedback circuit configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit, coupled to the first amplifier stage, the logic loop circuit configured to adjust a difference between the first output voltages of the first amplifier stage; a bias circuit, configured to generate a voltage close to a common-mode voltage of a plurality of second input voltages of the second amplifier stage, wherein the common-mode voltage is produced after the operational amplifier is turned on; a second common-mode feedback circuit, coupled to the first amplifier stage, the second common-mode feedback circuit configured to keep an output common-mode voltage of the first output voltages of the first amplifier stage at a reference voltage, wherein the voltage generated by the bias circuit serves as the reference voltage; and a plurality of switches, configured to control connection between the first amplifier stage, the second amplifier stage, the first output stage circuit, the second output stage circuit, the first common-mode feedback circuit, the logic loop circuit and the second common-mode feedback circuit to enable the operational amplifier to operate in an offset calibration phase. 2. The operational amplifier of claim 1 , wherein the output common-mode voltage of the second output stage circuit is close to an output common-mode voltage of the operational amplifier produced after the operational amplifier is turned on. 3. The operational amplifier of claim 1 , wherein the first output stage circuit is coupled to a plurality voltage sources and the second output stage circuit through the switches; when the operational amplifier turns on, the first output stage circuit is turned on according to a switching status of the switches. 4. The operational amplifier of claim 1 , wherein when the logic loop circuit is configured to adjust the difference between the first output voltages of the first amplifier stage, the first output stage circuit is turned off. 5. The operational amplifier of claim 1 , wherein after the offset calibration phase finishes, the difference between the first output voltages of the first amplifier stage is close to zero. 6. The operational amplifier of claim 5 , wherein after the offset calibration phase finishes, the second output stage circuit, the first common-mode feedback circuit, the second common-mode feedback circuit and the logic loop circuit are turned off, and the first output stage circuit and a third common-mode feedback circuit are turned on. 7. The operational amplifier of claim 6 , wherein the third common-mode feedback circuit is coupled to the first amplifier stage, and configured to keep an output common-mode voltage of a plurality of output voltages of the operational amplifier at the predetermined value. 8. A control method for offset calibration of an operational amplifier, the operational amplifier comprising a first amplifier stage, a second amplifier stage, a second output stage circuit, a first common-mode feedback circuit and a logic loop circuit, the control method comprising: utilizing the first amplifier stage to generate a plurality of first output voltages according to a plurality of first input voltages; utilizing the second amplifier stage, coupled to the first amplifier stage, to generate a plurality of second output voltages according to the first output voltages; utilizing the second output stage circuit to be coupled to the second amplifier stage and a first output stage circuit; when the offset calibration is performed, utilizing the first common-mode feedback circuit to keep an output common-mode voltage of the second output stage circuit at a predetermined value; and utilizing the logic loop circuit to adjust a difference between the first output voltages of the first amplifier stage to be close to zero. 9. The control method of claim 8 , wherein the operational amplifier further comprises a second common-mode feedback circuit; the control method further comprises: when the offset calibration is performed, utilizing the second common-mode feedback circuit to keep an output common-mode voltage of the first output voltages of the first amplifier stage at a voltage close to a common-mode voltage of a plurality of second input voltages of the second amplifier stage, wherein the common-mode voltage is produced after the operational amplifier is turned on. 10. The control method of claim 9 , wherein the operational amplifier further comprises a bias circuit; the control method further comprises: utilizing the bias circuit to generate the voltage close to the common-mode voltage of the second input voltages of the second amplifier stage. 11. The control method of claim 8 , the control method further comprises: utilizing the second output stage circuit to replicate an equivalent or a scaled-down version of the first output stage circuit. 12. The control method of claim 8 , wherein the second output stage circuit is coupled to the second amplifier stage, and the output common-mode voltage of the second output stage circuit is close to an output common-mode voltage produced after the operational amplifier is turned on. 13. The control method of claim 8 , wherein the operational amplifier further comprises a first output stage circuit; the control method further comprises: when the logic loop circuit adjusts the difference between the first output voltages of the first amplifier stage, turning off the first output stage circuit. 14. The control method of claim 8 , further comprising: after the offset calibration finishes, the difference between the first output voltages of the first amplifier stage is close to zero. 15. The control method of claim 9 , further comprising: after the offset calibration finishes, turning off the second output stage circuit, the first common-mode feedback circuit, the second common-mode feedback circuit and the logic loop circuit, and turning on the first output stage circuit and a third common-mode feedback circuit. 16. The control method of claim 8 , wherein the third common-mode feedback circuit is coupled to the first amplifier stage, and configured to keep an output common-mode voltage of a plurality of output voltages of the operational amplifier at the predetermined value. 17. An operational amplifier, comprising: a first amplifier stage, configured to generate a plurality of first output voltages according to a plurality of first input voltages; a second amplifier stage, coupled to the first amplifier stage, the second amplifier stage configured to generate a plurality of second output voltages according to the first output voltages; a second output stage circuit, coupled to the second amplifier stage and a first output stage circuit, the second output stage circuit configured to

Assignees

Inventors

Classifications

  • in wireless communication networks · CPC title

  • Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal · CPC title

  • Controlling being realised by adding a replica circuit or by using one among multiple identical circuits as a replica circuit · CPC title

  • the feedback circuit of the amplifier stage comprising a passive resistor and passive capacitor · CPC title

  • One or more switches are realised in the feedback circuit of the amplifier stage · CPC title

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What does patent US10819291B2 cover?
An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-m…
Who is the assignee on this patent?
Shenzhen Goodix Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03F3/45475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 27 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).