LED chip with improved bonding strength and LED module using the LED chip

US10818830B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10818830-B2
Application numberUS-202016829478-A
CountryUS
Kind codeB2
Filing dateMar 25, 2020
Priority dateNov 27, 2017
Publication dateOct 27, 2020
Grant dateOct 27, 2020

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An LED module is disclosed. The LED module includes: a mount substrate including electrodes; an LED chip including a semiconductor stacked structure, a passivation layer covering the outer surface of the semiconductor stacked structure, and electrode pads connected to the outer surface of the semiconductor stacked structure through openings formed in the passivation layer; and solder bumps connecting the electrode pads to the corresponding electrodes and formed using a solder material represented by Sn-M (where M is a metal).

First claim

Opening claim text (preview).

What is claimed is: 1. An LED module comprising: an LED chip comprising a substrate, a semiconductor stacked structure formed on the substrate and including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer, a first electrode pad connected to the first conductive semiconductor layer, and a second electrode pad connected to the second conductive semiconductor layer; a mount substrate comprising electrodes, one of the electrodes connected to the first electrode pad of the LED chip through a solder bump; and a passivation layer covering an outer surface of the semiconductor stacked structure and including an opening exposing an outer surface of an ohmic contact layer; wherein the passivation layer covers 70 to 90% of an area of the outer surface of the ohmic contact layer and exposes 10 to 30% of an area of the outer surface of the ohmic contact layer. 2. The LED module according to claim 1 , wherein the first electrode pad comprises a multilayer body formed of a plurality of metal layers and a surface contact part connected to the multilayer body. 3. The LED module according to claim 1 , wherein the first electrode pad comprises an Au end layer, and the Au end layer has a thickness of less than 1,500 Å. 4. The LED module according to claim 3 , wherein the Au end layer has a thickness of less than 15% of the thickness of the multilayer body. 5. The LED module according to claim 1 , wherein the ohmic contact layer is formed on the first conductive semiconductor layer. 6. The LED module according to claim 1 , wherein the first electrode pad is connected to the first conductive layer through the opening. 7. The LED module according to claim 2 , wherein the ohmic contact layer is connected to the surface contact part through one or more metal layers. 8. The LED module according to claim 2 , wherein the surface contact part is in contact with the passivation layer outside the opening. 9. The LED module according to claim 3 , wherein the first electrode pad comprises an intermediate metal stacked structure formed by stacking at least two metals between the Au end layer and a surface contact part. 10. An LED module comprising: an LED chip comprising a substrate, a semiconductor stacked structure formed on the substrate and including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer interposed between the first conductive semiconductor layer and the second conductive semiconductor layer, a first electrode pad connected to the first conductive semiconductor layer, and a second electrode pad connected to the second conductive semiconductor layer; a mount substrate comprising at least one electrode connected to the first electrode pad of the LED chip through a solder bump; and a passivation layer covering an outer surface of the semiconductor stacked structure and including an opening exposing an outer surface of an ohmic contact layer; wherein each of the first electrode pad comprises a surface contact part connected to the ohmic contact layer and a multilayer body connected to the surface contact part and formed of an Au end layer and a metal stacked structure without Au between the surface contact part and the Au end layer, wherein the passivation layer covers 70 to 90% of an area of the outer surface of the ohmic contact layer and exposes 10 to 30% of an area of the outer surface of the ohmic contact layer. 11. The LED module according to claim 10 , wherein the Au end layer has a thickness of less than 1,500 Å. 12. The LED module according to claim 10 , wherein the Au end layer has a thickness of less than 15% of the thickness of the multilayer body. 13. The LED module according to claim 10 , wherein the ohmic contact layer is connected to the surface contact part through one or more metal layers. 14. The LED module according to claim 10 , wherein the solder bump partially covers a side surface of the first electrode pad. 15. The LED module according to claim 10 , wherein the solder bump is formed of a solder material represented by Sn-M (where M is a metal). 16. An LED module comprising: a mount substrate comprising electrodes; and an LED chip comprising a semiconductor stacked structure, a passivation layer covering an outer surface of the semiconductor stacked structure, and an electrode pad connected to the semiconductor stacked structure through an opening formed in the passivation layer; wherein the electrode pad comprises: a multilayer body formed of a plurality of metal layers; a surface contact part connected to the multilayer body and the passivation layer; an ohmic contact layer connected to the semiconductor stacked structure; and one or more metal layers formed between the ohmic contact layer and the surface contact layer; wherein a surface of the surface contact part contacting the passivation layer has a different height from a surface of the surface contact part contacting the metal layers, wherein the passivation layer covers 70 to 90% of an area of the outer surface of the ohmic contact layer and exposes 10 to 30% of an area of the outer surface of the ohmic contact layer. 17. The LED module according to claim 16 , wherein the multilayer body comprises an Au end layer having a thickness of less than 1,500 Å and the thickness of less than 15% of the thickness of the multilayer body. 18. The LED module according to claim 16 , wherein the multilayer body comprises a structure in which different metal layers are alternately stacked. 19. The LED module according to claim 16 , wherein the surface contact part comprises a protrusion contacting the ohmic contact layer.

Assignees

Inventors

Classifications

  • Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

  • wherein the radiation-sensitive semiconductor devices have potential barriers · CPC title

  • characterised by their shape · CPC title

  • H10H20/857Primary

    Interconnections, e.g. lead-frames, bond wires or solder balls · CPC title

  • Multi-layer electrodes comprising at least one discontinuous layer · CPC title

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Frequently asked questions

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What does patent US10818830B2 cover?
An LED module is disclosed. The LED module includes: a mount substrate including electrodes; an LED chip including a semiconductor stacked structure, a passivation layer covering the outer surface of the semiconductor stacked structure, and electrode pads connected to the outer surface of the semiconductor stacked structure through openings formed in the passivation layer; and solder bumps conn…
Who is the assignee on this patent?
Lumens Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10H20/857. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 27 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).