Cryogenic on-chip microwave filter for quantum devices

Patent metadata

Field	Value
Publication number	US-10811748-B2
Application number	US-201816135703-A
Country	US
Kind code	B2
Filing date	Sep 19, 2018
Priority date	Sep 19, 2018
Publication date	Oct 20, 2020
Grant date	Oct 20, 2020

Abstract

An on-chip microwave filter circuit includes a substrate formed of a first material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates. The filter circuit further includes a dispersive component configured to filter a plurality of frequencies in an input signal, the dispersive component including a first transmission line disposed on the substrate, the first transmission line being formed of a second material that exhibits at least a second threshold level of thermal conductivity, wherein the second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates. The dispersive component further includes a second transmission line disposed on the substrate, the second transmission line being formed of the second material.

First claim

What is claimed is:

1. An on-chip microwave filter circuit comprising:
a substrate formed of a first material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
a dispersive component configured to filter a plurality of frequencies in an input signal, the dispersive component comprising:
a first transmission line disposed on the substrate, the first transmission line being formed of a second material that exhibits at least a second threshold level of thermal conductivity, wherein the first transmission line has a width of about 0.5 mm, wherein the second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
a second transmission line disposed on the substrate, the second transmission line being formed of the second material.

2. The circuit of claim 1 , further comprising:
a connector coupled to the first transmission line, the connector being formed of a third material that exhibits at least a third threshold level of thermal conductivity, wherein the third threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates.

3. The circuit of claim 2 , further comprising:
a second connector coupled to the second transmission line, the second connector being formed of the third material.

4. The circuit of claim 2 , wherein the second material and the third material are the same.

5. The circuit of claim 1 , the dispersive component further comprising:
a third transmission line disposed on the substrate, the third transmission line being formed of the second material.

6. The circuit of claim 5 , wherein the third transmission line is disposed on the substrate between the first transmission line and the second transmission line.

7. The circuit of claim 5 , wherein the third transmission line is spaced apart on the substrate from the first transmission line.

8. The circuit of claim 1 , wherein the first transmission line has a thickness of about 10 nm to 1000 nm.

9. The circuit of claim 1 , further comprising:
a housing coupled to the substrate, the housing being formed of a fourth material that exhibits at least a fourth threshold level of thermal conductivity, wherein the fourth threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates.

10. A fabrication system performing operations comprising:
forming a substrate, the substrate being formed of a first material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
forming an on-chip microwave filter on the substrate by assembling a circuit having two ports, the circuit comprising:
a dispersive component to filter a plurality of frequencies in an input signal, the dispersive component comprising:
a first transmission line deposited on the substrate, the first transmission line being formed of a second material that exhibits at least a second threshold level of thermal conductivity, wherein the first transmission line has a width of about 0.5 mm, wherein the second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
a second transmission line deposited on the substrate, the second transmission line being formed of the second material.

11. A method comprising:
forming a substrate, the substrate being formed of a first material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
forming an on-chip microwave filter on the substrate by assembling a circuit having two ports, the circuit comprising:
a dispersive component to filter a plurality of frequencies in an input signal, the dispersive component comprising:
a first transmission line deposited on the substrate, the first transmission line being formed of a second material that exhibits at least a second threshold level of thermal conductivity, wherein the first transmission line has a width of about 0.5 mm, wherein the second threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates; and
a second transmission line deposited on the substrate, the second transmission line being formed of the second material.

12. The method of claim 11 , further comprising:
forming a housing, the housing comprising:
a closable structure in which the circuit is positioned, the structure being formed of a third material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates.

13. The method of claim 11 , further comprising:
coupling a first connector to the first transmission line, the first connector being formed of a fourth material that exhibits at least a threshold level of thermal conductivity, wherein the threshold level of thermal conductivity is achieved at a cryogenic temperature range in which a quantum computing circuit operates.

14. The method of claim 13 , further comprising:
coupling a second connector to the second transmission line, the second connector being formed of the fourth material.

15. The method of claim 13 , wherein the fourth material and the second material are the same.

16. The method of claim 11 , wherein the dispersive component further comprises:
a third transmission line being formed of the second material.

17. The method of claim 16 , wherein the third transmission line is disposed between the first transmission line and the second transmission line on the substrate.

18. The method of claim 16 , wherein the third transmission line is spaced apart on the substrate from the first transmission line.

19. The method of claim 11 , wherein the first transmission line has a thickness of about 10 nm to 1000 nm.

Assignees

• IBM

Inventors

• Gumann Patryk
• Olivadese Salvatore B
• Brink Markus

Classifications

• H10W40/10

  Arrangements for heating · CPC title

• G06N10/20

  Models of quantum computing, e.g. quantum circuits or universal quantum computers · CPC title

• G06N10/40

  Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control · CPC title

• H01P1/20363

  Linear resonators · CPC title

• H01P1/30 Primary

  for compensation of, or protection against, temperature or moisture effects {; for improving power handling capability (H01P1/04, H01P1/08 take precedence)} · CPC title