Vertical MOSFET having insulated trenches and base region contact

Patent metadata

Field	Value
Publication number	US-10811523-B2
Application number	US-201815936723-A
Country	US
Kind code	B2
Filing date	Mar 27, 2018
Priority date	Mar 28, 2017
Publication date	Oct 20, 2020
Grant date	Oct 20, 2020

Abstract

A semiconductor device having a first surface formed at a first height and a second surface formed at a second height on a semiconductor substrate includes: a base region formed in the semiconductor substrate; a trench formed from the first surface and the second surface into the semiconductor substrate; a gate insulating film covering an inner side of the trench; a gate electrode embedded to a third height; an insulating film formed on the gate electrode; a first region which has the first surface and in which a base contact region is formed; and a second region which has the second surface and in which a source region is formed, the first region and the second region being alternately arranged in the trench extension direction to prevent a reduction in channel formation density.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a semiconductor substrate having a first surface at a first height and a second surface at a second height different from the first height;
a first electrode on the first surface and the second surface in a contact manner; and
a second electrode on a back surface of the semiconductor substrate in a contact manner,
the semiconductor substrate further comprising:
a back surface semiconductor electrode layer of a first conductivity type having a predetermined thickness from the back surface of the semiconductor substrate;
a base region of a second conductivity type on the back surface semiconductor electrode layer;
a trench extending from the first surface and the second surface to an upper surface of the back surface semiconductor electrode layer;
a gate insulating film on a side surface and a bottom surface of the trench below a third height between the second surface and the bottom surface of the trench;
a gate electrode embedded in the trench to the third height along the gate insulating film;
an insulating film on the gate insulating film and the gate electrode inside the trench, and having an upper surface vertically extending to a higher position of the first height and the second height; and
a first region and a second region alternately situated along the trench and having the first surface and the second surface, respectively,
the first region having a base contact region of the second conductivity type, the base contact region including a portion in contact with the base region and a portion in contact with the first electrode, and having a concentration higher than a concentration of the base region,
the second region having a source region, the source region including a portion in contact with the base region, a portion along an outer side surface of the trench from the second surface to the third height, and a portion in contact with the first electrode,
wherein the base contact region is vertically separated from the source region by an intervening portion of the base region along a sidewall of the trench, such that the base contact region and the source region are not in contact with each other.

2. A semiconductor device according to claim 1 , wherein the second height is lower than the first height, and is lower than the base contact region.

3. A semiconductor device according to claim 2 , wherein the semiconductor device comprises an insulated gate bipolar transistor including a collector layer of the second conductivity type between the back surface semiconductor electrode layer and the second electrode.

4. A semiconductor device according to claim 1 , wherein the first height is lower than the second height, and is lower than the source region.

5. A semiconductor device according to claim 4 , wherein the semiconductor device comprises an insulated gate bipolar transistor including a collector layer of the second conductivity type between the back surface semiconductor electrode layer and the second electrode.

6. A semiconductor device according to claim 1 , wherein the semiconductor device comprises an insulated gate bipolar transistor including a collector layer of the second conductivity type between the back surface semiconductor electrode layer and the second electrode.

7. A semiconductor device, comprising:
a semiconductor substrate having a first surface at a first height and a second surface at a second height different from the first height;
a first electrode on the first surface and the second surface in a contact manner; and
a second electrode on a back surface of the semiconductor substrate in a contact manner,
the semiconductor substrate further comprising:
a back surface semiconductor electrode layer of a first conductivity type having a predetermined thickness from the back surface of the semiconductor substrate;
a base region of a second conductivity type on the back surface semiconductor electrode layer;
a trench extending from the first surface and the second surface to an upper surface of the back surface semiconductor electrode layer;
a gate insulating film on a side surface and a bottom surface of the trench below a third height between the second surface and the bottom surface of the trench;
a gate electrode embedded in the trench to the third height along the gate insulating film;
an insulating film on the gate insulating film and the gate electrode inside the trench, and having an upper surface at any higher position of the first height and the second height; and
a first region and a second region alternately situated along the trench and having the first surface and the second surface, respectively,
the first region having a base contact region of the second conductivity type, the base contact region including a portion in contact with the base region and a portion in contact with the first electrode, and having a concentration higher than a concentration of the base region,
the second region having a source region, the source region including a portion in contact with the base region, a portion along an outer side surface of the trench from the second surface to the third height, and a portion in contact with the first electrode,
wherein the base contact region is separated from the source region by a portion of the base region along a sidewall of the trench underlying one of the base contact region and the source region, such that the base contact region has a height difference with respect to the source region, and the base contact region and the source region are not in contact with each other.

Assignees

• Ablic Inc

Inventors

• Yoshimura Mitsuhiro
• Hatakenaka Masahiro

Classifications

• H10D30/658

  having trench gate electrodes · CPC title

• H10D64/232

  Emitter electrodes for IGBTs · CPC title

• H10D10/40 Primary

  Vertical BJTs {(Vertical Heterojunction BJTs H10D10/821)} · CPC title

• H10D64/256

  for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies (source or drain electrodes of TFTs H10D30/673) · CPC title

• H10D64/23

  Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes · CPC title