Obtaining state information of threads of a device

Patent metadata

Field	Value
Publication number	US-10802901-B2
Application number	US-201615212821-A
Country	US
Kind code	B2
Filing date	Jul 18, 2016
Priority date	Jul 18, 2016
Publication date	Oct 13, 2020
Grant date	Oct 13, 2020

Abstract

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The embedded-system device determines a respective operational state of each of one or more threads of a process executing on the embedded-system device. The embedded-system device stores the respective operational state of each of the one or more threads in a thread state register in a memory of the embedded-system device. The embedded-system device stores information data associated with the respective operational state of each of the one or more threads in the thread state register. The embedded-system device determines that operation of at least one thread of the one or more threads is abnormal. The embedded-system device retrieves the stored operational states of the one or more threads from the thread state register in response to the determination. The embedded-system device outputs the retrieved operational states.

First claim

What is claimed is:

1. A method of operating an embedded-system device, comprising:
determining a respective operational state of each of one or more threads of a process executing on the embedded-system device, wherein the process is loaded in a memory of the embedded-system device;
storing the respective operational state of each of the one or more threads in a thread state register in the same memory of the embedded-system device;
determining, by a monitor thread of the process, operation of each of the one or more threads periodically to be normal or abnormal;
in response to determining that the operation of at least one thread of the one or more threads is abnormal, retrieving the stored operational states of the one or more threads from the thread state register, and immediately outputting the retrieved operational states of the one or more threads to a non-volatile memory, wherein the operational states of the one or more threads that are output at different times are stored in the non-volatile memory to maintain a history of the operational states of the one or more threads;
receiving, from another device, a request for the operational states of the one or more threads through a standardized Intelligent Platform Management Interface (IPMI) interface;
in response to the request, retrieving the operational states stored in the non -volatile memory; and
sending the retrieved operational states to the another device through the standardized IPMI interface.

2. The method of claim 1 , further comprising storing information data associated with the respective operational state of each of the one or more threads in the thread state register.

3. The method of claim 2 , wherein the information data of the each thread include a thread indicator of the each thread.

4. The method of claim 2 , wherein the information data of the each thread include at least one of an indicator of an iteration count, an indicator of presence of an external loop, and an indicator of a sub-function of the each thread.

5. The method of claim 1 , wherein the determining that the operational state of the at least one thread is abnormal includes determining that the operational state of the at least one thread has not been updated for a predetermined time period.

6. The method of claim 1 , wherein each of the one or more threads operates in one or more operational states.

7. The method of claim 1 , wherein the respective operational state of each of the one or more threads is determined by the each thread.

8. The method of claim 7 , wherein the respective operational state of each of the one or more threads is further determined based on a respective function invoked by the each thread.

9. The method of claim 8 , further comprising:
the respective function determining that the each thread has invoked the respective function, wherein the respective operational state is stored in the thread state register by the respective function in association with the each thread.

10. The method of claim 9 , wherein the respective operational state is associated with the each thread by a thread indicator of the each thread.

11. The method of claim 7 , wherein the respective operational state of each of the one or more threads is determined a plurality of times throughout operation of the each thread when the each thread executes one or more functions.

12. The method of claim 11 , wherein the one or more functions include at least one of a write function, a read function, a listen function, a send function, and a wait function.

13. An apparatus, the apparatus being an embedded-system device, comprising:
a memory; and
at least one processor coupled to the memory and configured to:
determine a respective operational state of each of one or more threads of a process executing on the embedded-system device, wherein the process is loaded in the memory of the embedded-system device;
store the respective operational state of each of the one or more threads in a thread state register in the same memory of the embedded-system device;
determine, by a monitor thread of the process, operation of each of the one or more threads periodically to be normal or abnormal; and
in response to determining that the operation of at least one thread of the one or more threads is abnormal, retrieve the stored operational states of the one or more threads from the thread state register, and immediately output the retrieved operational states of the one or more threads to a non-volatile memory, wherein the operational states of the one or more threads that are output at different times are stored in the non-volatile memory to maintain a history of the operational states of the one or more threads;
receive, from another device, a request for the operational states of the one or more threads through a standardized Intelligent Platform Management Interface (IPMI) interface;
in response to the request, retrieve the operational states stored in the non -volatile memory; and
send the retrieved operational states to the another device through the standardized IPMI interface.

14. The apparatus of claim 13 , wherein the at least one processor is further configured to store information data associated with the respective operational state of each of the one or more threads in the thread state register.

15. A non-transitory computer-readable medium storing computer executable code for operating an embedded-system device, comprising code to:
determine a respective operational state of each of one or more threads of a process executing on the embedded-system device, wherein the process is loaded in a memory of the embedded-system device;
store the respective operational state of each of the one or more threads in a thread state register in the same memory of the embedded-system device;
determine, by a monitor thread of the process, operation of each of the one or more threads periodically to be normal or abnormal; and
in response to determining that the operation of at least one thread of the one or more threads is abnormal, retrieve the stored operational states of the one or more threads from the thread state register, and immediately output the retrieved operational states of the one or more threads to a non-volatile memory, wherein the operational states of the one or more threads that are output at different times are stored in the non-volatile memory to maintain a history of the operational states of the one or more threads;
receive, from another device, a request for the operational states of the one or more threads through a standardized Intelligent Platform Management Interface (IPMI) interface;
in response to the request, retrieve the operational states stored in the non-volatile memory; and
send the retrieved operational states to the another device through the standardized IPMI interface.

16. The non-transitory computer-readable medium of claim 15 , wherein the code is further configured to store information data associated with the respective operational state of each of the one or more threads in the thread state register.

Assignees

• American Megatrends Int Llc

Inventors

• Thomas Satheesh
• Ravichandran Rajeswari
• Venkataraman Aruna
• Sachidanandam Pavithra
• Thangavel Senathipathy
• Moorthy Thamarai Selvan

Classifications

• G06F11/3017

  where the computing system is implementing multitasking (multiprogramming arrangements G06F9/46; allocation of resources G06F9/50) · CPC title

• G06F11/302

  where the computing system component is a software system · CPC title

• G06F11/0715 Primary

  in a system implementing multitasking (multitasking per se G06F9/46) · CPC title