Techniques of storing operational states of processes at particular memory locations of an embedded-system device

Patent metadata

Field	Value
Publication number	US-10474517-B2
Application number	US-201615212751-A
Country	US
Kind code	B2
Filing date	Jul 18, 2016
Priority date	Jul 18, 2016
Publication date	Nov 12, 2019
Grant date	Nov 12, 2019

Abstract

A method, a computer-readable medium, and an apparatus are provided. The apparatus may be an embedded-system device. The embedded-system device determines a respective operational state of each of one or more processes of the embedded-system device. The embedded-system device stores the respective operational state of each of the one or more processes at a memory location in a respective memory area for the each process in a memory of the embedded-system device. The embedded-system device stores the memory locations associated with the one or more processes in a register in the memory. The embedded-system device obtains, from the register, a memory location of at least one process of the one or more processes. The embedded-system device obtains, based on the memory location of the at least one process, the stored operational state of the at least one process from the respective memory area for the at least one process.

First claim

What is claimed is:

1. A method of operating an embedded-system device, comprising:
determining a respective operational state of each of one or more processes loaded in a primary memory of the embedded-system device;
storing the respective operational state of each of the one or more processes at a memory location in a respective memory area for the each process in the same primary memory;
storing the memory locations associated with the one or more processes in a register in the same primary memory;
obtaining, from the register, a memory location of at least one process of the one or more processes; and
obtaining, based on the memory location of the at least one process, the stored operational state of the at least one process from the respective memory area for the at least one process.

2. The method of claim 1 , wherein the respective memory location associated with each of the one or more processes indicates a memory sub-area dedicated for storing the respective operational state of the each process and information data associated with the respective operational state, the respective operational state being stored in the dedicated memory sub-area, the method further comprising:
storing the information data associated with the respective operational state of each of the one or more processes in the dedicated memory sub-area of the each process.

3. The method of claim 1 , wherein each of the one or more processes operates in one or more operational states.

4. The method of claim 1 , wherein the respective operational state of each of the one or more processes is determined by the each process.

5. The method of claim 4 , wherein the respective operational state of each of the one or more processes is further determined based on a function of the each process being invoked.

6. The method of claim 4 , wherein the respective operational state of each of the one or more processes is determined a plurality of times throughout operation of the each process when the each process executes one or more functions.

7. The method of claim 6 , wherein the one or more functions include at least one of a write function, a read function, a listen function, a send function, and a wait function.

8. The method of claim 1 , further comprising:
determining the memory location in the respective memory area of each of the one or more processes after that the each process is started and prior to that an initial operational state of the each process is determined.

9. The method of claim 1 , wherein the respective memory area for each of the one or more processes is a virtual memory area, wherein the memory location of the each process is a virtual memory address, wherein the operational state of the at least one process is obtained by a monitor process requesting data at the virtual memory address.

10. The method of claim 1 , wherein the respective memory area for each of the one or more processes is a virtual memory area, wherein the memory location of the each process is a virtual memory address, the method further comprising:
converting the virtual memory address of the at least one process to a physical memory address, wherein the operational state of the at least one process is obtained by a monitor process requesting data at the physical memory address.

11. The method of claim 1 , further comprising:
receiving a request through an Intelligent Platform Management Interface (IPMI) interface from a host computer or a remote device, wherein the request includes an indication of the at least one process, wherein the memory location of the at least one process is obtained from the register based on the indication;
sending an IPMI response to the host computer or the remote device, the IPMI response including the obtained operational state of the at least one process.

12. The method of claim 1 , further comprising:
storing the operational state of the at least one process obtained from the respective memory area of the at least one process in a non-volatile memory.

13. The method of claim 12 , wherein the operational state of the at least one process at different times are stored in the non-volatile memory to maintain a history of the operational states of the at least one process.

14. The method of claim 1 , wherein a monitor process continuously monitors the operational states of the one or more processes at predetermined time points and stores the respective last predetermined number of operational states of each of the one or more processes in a non-volatile memory when a process of the one or more processes is terminated unexpectedly.

15. An apparatus, the apparatus being an embedded-system device, comprising:
a primary memory; and
at least one processor coupled to the primary memory and configured to:
determine a respective operational state of each of one or more processes loaded in the primary memory of the embedded-system device;
store the respective operational state of each of the one or more processes at a memory location in a respective memory area for the each process in the same primary memory;
store the memory locations associated with the one or more processes in a register in the same primary memory;
obtain, from the register, a memory location of at least one process of the one or more processes; and
obtain, based on the memory location of the at least one process, the stored operational state of the at least one process from the respective memory area for the at least one process.

16. The apparatus of claim 15 , wherein the respective memory location associated with each of the one or more processes indicates a memory sub-area dedicated for storing the respective operational state of the each process and information data associated with the respective operational state, the respective operational state being stored in the dedicated memory sub-area, wherein the at least one processor is further configured to:
store the information data associated with the respective operational state of each of the one or more processes in the dedicated memory sub-area of the each process.

17. The apparatus of claim 15 , wherein each of the one or more processes operates in one or more operational states.

18. A non-transitory computer-readable medium storing computer executable code for operating an embedded-system device, comprising code to:
determine a respective operational state of each of one or more processes loaded in a primary memory of the embedded-system device;
store the respective operational state of each of the one or more processes at a memory location in a respective memory area for the each process in the same primary memory;
store the memory locations associated with the one or more processes in a register in the same primary memory;
obtain, from the register, a memory location of at least one process of the one or more processes; and
obtain, based on the memory location of the at least one process, the stored operational state of the at least one process from the respective memory area for the at least one process.

19. The non-transitory computer-readable medium of claim 18 , wherein the respective memory location associated with each of the one or more processes indicates a memory sub-area dedicated for storing the respective operational state of the each process and information data associated with the respective operational state, the respective operational state being stored in the dedicated memory sub-area, wherein the code is further configured to:
store the information data associated with the respective

Assignees

• American Megatrends Int Llc

Inventors

• Thomas Satheesh
• Vinodhini J
• Balakrishnan Venkatesan
• Parthiban Baskar

Classifications

• G11C16/10

  Programming or data input circuits · CPC title

• G06F11/2236

  to test CPU or processors · CPC title

• G05B11/01

  electric · CPC title

• G06F11/3636

  by tracing the execution of the program · CPC title

• G06F11/0766 Primary

  Error or fault reporting or storing · CPC title