Amplifier offset cancellation using amplifier supply voltage

Patent metadata

Field	Value
Publication number	US-10797651-B2
Application number	US-201816348824-A
Country	US
Kind code	B2
Filing date	Apr 27, 2018
Priority date	Apr 28, 2017
Publication date	Oct 6, 2020
Grant date	Oct 6, 2020

Abstract

In accordance with embodiments of the present disclosure, a method for power supply rejection for an amplifier may include generating a correction signal by multiplying a quantity indicative of a power supply voltage of the amplifier by a transfer function defining a response from the power supply voltage of the amplifier to an output signal of the amplifier and subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.

First claim

What is claimed is:

1. A method for power supply offset rejection for an amplifier, comprising:
converting a power supply voltage of the amplifier into a quantity indicative of the power supply voltage, wherein the quantity is a digital signal;
generating a correction signal by multiplying the quantity by a transfer function defining a response from the power supply voltage to an output signal of the amplifier; and
subtracting the correction signal from a signal within a signal path of a circuit comprising the amplifier.

2. The method of claim 1 , wherein the amplifier comprises an audio amplifier.

3. The method of claim 1 , wherein subtracting the correction signal from the signal comprises subtracting the correction signal from an analog signal within an analog domain of the signal path.

4. The method of claim 3 , wherein the correction signal is applied through a multiplying digital-to-analog converter.

5. The method of claim 1 , wherein subtracting the correction signal from the signal comprises subtracting the correction signal from a digital signal within a digital domain of the signal path.

6. The method of claim 5 , wherein the quantity indicative of the power supply voltage is a predicted estimate of the power supply voltage based on an input signal of the signal path.

7. The method of claim 5 , wherein subtracting the correction signal comprises subtracting the correction signal from an input signal of the amplifier.

8. The method of claim 5 , wherein subtracting the correction signal comprises subtracting the correction signal from the output signal of the amplifier.

9. The method of claim 1 , wherein the quantity is an equivalent digital signal of the power supply voltage.

10. A system for power supply offset rejection for an amplifier, comprising:
an input configured to receive a quantity indicative of a power supply voltage of the amplifier, wherein the quantity is a digital signal; and
a control circuit configured to:
generate a correction signal by multiplying the quantity by a transfer function defining a response from the power supply voltage to an output signal of the amplifier; and
subtract the correction signal from a signal within a signal path of a circuit comprising the amplifier.

11. The system of claim 10 , wherein the amplifier comprises an audio amplifier.

12. The system of claim 10 , wherein the control circuit is configured to subtract the correction signal from the signal by subtracting the correction signal from an analog signal within an analog domain of the signal path.

13. The system of claim 12 , wherein the control circuit is configured to apply the correction signal through a multiplying digital-to-analog converter.

14. The system of claim 10 , wherein the control circuit is configured to subtract the correction signal from a digital signal within a digital domain of the signal path.

15. The system of claim 14 , wherein the quantity indicative of the power supply voltage is a predicted estimate of the power supply voltage based on an input signal of the signal path.

16. The system of claim 14 , wherein the control circuit is configured to subtract the correction signal from an input signal of the amplifier.

17. The system of claim 14 , wherein the control circuit is configured to subtract the correction signal from the output signal of the amplifier.

18. The system of claim 10 , wherein the quantity is an equivalent digital signal of the power supply voltage.

Assignees

• Cirrus Logic Int Semiconductor Ltd
• Mackay Graeme Gordon
• Cirrus Logic Inc

Inventors

• Mackay Graeme Gordon
• Zhu Lei
• He Ku
• Parupalli Vamsikrishna

Classifications

• H03F2203/45681

  the LC comprising offset compensating means · CPC title

• H03F2203/45601

  the IC comprising one or more passive resistors by feedback · CPC title

• H03F2203/45596

  the IC comprising one or more biasing resistors · CPC title

• H03F2203/45594

  the IC comprising one or more resistors, which are not biasing resistor · CPC title

• H03F2203/45588

  the IC comprising offset compensating means · CPC title