Metal gate structures for field effect transistors

Patent metadata

Field	Value
Publication number	US-10797151-B2
Application number	US-201916438168-A
Country	US
Kind code	B2
Filing date	Jun 11, 2019
Priority date	Sep 27, 2018
Publication date	Oct 6, 2020
Grant date	Oct 6, 2020

Abstract

The present disclosure describes a method for the formation of gate stacks having two or more titanium-aluminum (TiAl) layers with different Al concentrations (e.g., different Al/Ti ratios). For example, a gate structure can include a first TiAl layer with a first Al/Ti ratio and a second TiAl layer with a second Al/Ti ratio greater than the first Al/Ti ratio of the first TiAl layer.

First claim

What is claimed is:

1. A semiconductor structure, comprising:
fins on a substrate;
an isolation layer on the substrate covering a bottom portion of the fins; and
a gate structure on a portion of the fins not covered by the isolation layer, wherein the gate structure comprises:
a first titanium-aluminum (TiAl) layer on the fins having a first Al/Ti ratio; and
a second TiAl layer on the first TiAl layer having a second Al/Ti ratio greater than the first Al/Ti ratio.

2. The semiconductor structure of claim 1 , wherein the first Al/Ti ratio is equal to or less than about 80% of the second Al/Ti ratio.

3. The semiconductor structure of claim 1 , wherein a thickness of the first TiAl layer is between about 30% and about 300% of a thickness of the second TiAl layer.

4. The semiconductor structure of claim 1 , wherein the first Al/Ti ratio varies within the first TiAl layer.

5. The semiconductor structure of claim 1 , wherein the gate structure further comprises a third TiAl layer on the second TiAl layer, wherein the third TiAl layer has a third Al/Ti ratio less than the second Al/Ti ratio.

6. The semiconductor structure of claim 5 , wherein the third Al/Ti ratio is equal to or less than about 80% of the second Al/Ti ratio.

7. The semiconductor structure of claim 5 , wherein a thickness of the third TiAl layer is between about 30% and about 300% of that of the second TiAl layer.

8. The semiconductor structure of claim 5 , wherein the third Al/Ti ratio varies within the third TiAl layer.

9. A semiconductor structure, comprising:
fins on a substrate;
an isolation region on the substrate covering a bottom portion of the fins; and
a gate structure on a portion of the fins not covered by the isolation region, wherein the gate structure comprises:
a first titanium-aluminum (TiAl) layer having a first Al/Ti ratio;
a second TiAl layer having a second ratio greater than the first Al/Ti ratio; and
a third TiAl layer having a third Al/Ti ratio less than the second Al/Ti ratio, wherein the second TiAl layer is disposed between the first and third TiAl layers.

10. The semiconductor structure of claim 9 , wherein the first and third Al/Ti ratios are less than about 80% of the second Al/Ti ratio.

11. The semiconductor structure of claim 9 , wherein each of the first and second TiAl layers has a thickness between about 30% and about 300% of that of the third TiAl layer.

12. The semiconductor structure of claim 9 , wherein the first or second Al/Ti ratio varies within the first or second TiAl layer respectively.

13. The semiconductor structure of claim 9 , wherein the first and second Al/Ti ratios vary within the first and second TiAl layers respectively.

14. The semiconductor structure of claim 9 , wherein the first, second, and third TiAl layers form a TiAl stack.

15. A semiconductor structure, comprising:
a fin on a substrate;
an isolation region on the substrate covering a bottom portion of the fin; and
a gate stack on a portion of the fin and on a portion of the isolation region, wherein the gate stack comprises:
a dielectric stack on the fin;
a capping layer on the dielectric stack;
a barrier layer on the capping layer;
a titanium-aluminum (TiAl) stack on the barrier layer and comprising two or more TiAl layers; and
a metal fill on the TiAl stack.

16. The semiconductor structure of claim 15 , wherein the two or more TiAl layers comprise:
a first TiAl layer having a first Al/Ti ratio; and
a second TiAl layer having a second Al/Ti ratio greater than the first Al/Ti ratio.

17. The semiconductor structure of claim 16 , wherein the first Al/Ti ratio is equal to or less than about 80% of the second Al/Ti ratio.

18. The semiconductor structure of claim 16 , wherein the first Al/Ti ratio varies within the first TiAl layer.

19. The semiconductor structure of claim 15 , wherein the two or more TiAl layers comprise:
a first TiAl layer having a first Al/Ti ratio;
a second TiAl layer having a second. Al/Ti ratio; and
a third TiAl layer having a third Al/Ti ratio, wherein the second Al/Ti ratio is greater than the first and third Al/Ti ratios and the second TiAl layer is disposed between the first and the third TiAl layers.

20. The semiconductor structure of claim 19 , wherein the first and third Al/Ti ratios are equal to or less than about 80% of the second Al/Ti ratio.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Wang Chih-Wei
• Tsai Chia-Ming
• Liu Ke-Chih
• Savant Chandrashekhar Prakash
• Yu Tien-Wei

Classifications

• H10D64/01318

  the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314) · CPC title

• H10D30/024

  of fin field-effect transistors [FinFET] · CPC title

• H10D84/0158

  the components including FinFETs · CPC title

• H10D84/0135

  Manufacturing their gate conductors · CPC title

• H10D30/6215 Primary

  having multiple independently-addressable gate electrodes · CPC title