Discrete capacitance switching circuit and capacitor array circuit including the same

Patent metadata

Field	Value
Publication number	US-10796883-B2
Application number	US-201916240178-A
Country	US
Kind code	B2
Filing date	Jan 4, 2019
Priority date	Jun 28, 2018
Publication date	Oct 6, 2020
Grant date	Oct 6, 2020

Abstract

A discrete capacitance switching circuit includes a DC decoupling capacitor connected between a power node that receives an AC signal and a first node, a diode connected between the first node and a second node, a unit capacitor connected between the second node and a reference node that receives a ground voltage, and a bias circuit. The bias circuit is configured to apply a first DC voltage to the first node and apply a second DC voltage to the second node. The applied first and second DC voltages control a switching operation of the diode.

First claim

What is claimed is:

1. A discrete capacitance switching circuit, comprising:
a direct current (DC) decoupling capacitor connected between a power node that receives an alternating current (AC) signal and a first node;
a diode connected between the first node and a second node;
a unit capacitor connected between the second node and a reference node that receives a ground voltage; and
a bias circuit configured to apply a first DC voltage to the first node and apply a second DC voltage to the second node, wherein the first DC voltage and the second DC voltage control a switching operation of the diode.

2. The discrete capacitance switching circuit of claim 1 , wherein a first capacitance value is applied to the power node in a first operation mode while the diode is turned on, and a second capacitance value lower than the first capacitance value is applied to the power node in a second operation mode while the diode is turned off.

3. The discrete capacitance switching circuit of claim 1 , wherein a cathode electrode of the diode is connected to the first node and an anode electrode of the diode is connected to the second node.

4. The discrete capacitance switching circuit of claim 3 , wherein a switching operation of the diode is controlled by changing the first DC voltage applied to the first node.

5. The discrete capacitance switching circuit of claim 3 , wherein the bias circuit applies a bias voltage as the first DC voltage to the first node,
wherein the diode is turned off in response to the bias circuit applying the bias voltage as the first DC voltage to the first node, and the bias voltage is about equal to or greater than a peak voltage of the AC signal.

6. The discrete capacitance switching circuit of claim 3 , wherein the bias circuit applies the ground voltage as the first DC voltage to the first node in a first operation mode while the diode is turned on, and applies the ground voltage as the second DC voltage to the second node in a second operation mode while the diode is turned off.

7. The discrete capacitance switching circuit of claim 6 , wherein the bias circuit applies a bias voltage greater than the ground voltage as the first DC voltage to the first node in the second operation mode, and applies the ground voltage as the second DC voltage to the second node in the first operation mode.

8. The discrete capacitance switching circuit of claim 7 , wherein the bias voltage is about equal to or greater than a peak voltage of the AC signal.

9. The discrete capacitance switching circuit of claim 3 , wherein the bias circuit comprises:
a chalk inductor connected between the first node and a switching node;
a first switch connected between the switching node and the reference node; and
a second switch connected between the switching node and a bias node that receives a bias voltage.

10. The discrete capacitance switching circuit of claim 9 , wherein the diode is turned on when the first switch is turned on and the second switch is turned off, and the diode is turned off when the first switch is turned off and the second switch is turned on.

11. The discrete capacitance switching circuit of claim 9 , wherein the bias circuit further comprises:
a DC inductor connected between the second node and the reference node.

12. The discrete capacitance switching circuit of claim 1 , further comprising:
a reference capacitor connected between the power node and the reference node.

13. The discrete capacitance switching circuit of claim 12 , wherein a total capacitance value of the unit capacitor and the reference capacitor is applied to the power node in a first operation mode while the diode is turned on, and a capacitance value of the reference capacitor is applied to the power node in a second operation mode while the diode is turned off.

14. The discrete capacitance switching circuit of claim 1 , further comprising:
a bias generator configured to generate a bias voltage about equal to or greater than a peak voltage of the AC signal,
wherein the bias voltage is provided to the bias circuit.

15. A discrete capacitance switching circuit, comprising:
a direct current (DC) decoupling capacitor connected between a power node that receives an alternating current (AC) signal and a first node;
a diode comprising a cathode electrode connected to the first node and an anode electrode connected to a second node;
a unit capacitor connected between the second node and a reference node that receives a ground voltage;
a bias circuit configured to apply a first DC voltage to the first node and apply a second DC voltage to the second node, wherein the first DC voltage and the second DC voltage control a switching operation of the diode;
a chalk inductor connected between the first node and a switching node;
a first switch connected between the switching node and the reference node;
a second switch connected between the switching node and a bias node that receives a bias voltage;
a DC inductor connected between the second node and the reference node; and
a reference capacitor connected between the power node and the reference node.

16. The discrete capacitance switching circuit of claim 15 , further comprising:
a bias generator configured to generate the bias voltage,
wherein the bias voltage is about equal to or greater than a peak voltage of the AC signal, and the bias voltage is applied to the bias node.

17. The discrete capacitance switching circuit of claim 15 , wherein the diode is turned on when the first switch is turned on and the second switch is turned off, and the diode is turned off when the first switch is turned off and the second switch is turned on.

18. A capacitor array circuit, comprising:
a reference capacitor connected between a power node that receives an alternating current (AC) signal and a reference node that receives a ground voltage; and
a plurality of discrete capacitance switching circuits connected in parallel between the power node and the reference node,
wherein each of the plurality of discrete capacitance switching circuits comprises:
a direct current (DC) decoupling capacitor connected between the power node and a first node;
a diode connected between the first node and a second node;
a unit capacitor connected between the second node and the reference node; and
a bias circuit configured to apply a first DC voltage to the first node and apply a second DC voltage to the second node, wherein the first DC voltage and the second DC voltage control a switching operation of the diode.

19. The capacitor array circuit of claim 18 , further comprising:
a plurality of unit capacitors respectively included in the plurality of discrete capacitance switching circuits,
wherein the unit capacitor is one of the plurality of unit capacitors, and the unit capacitors have a same capacitance value.

20. The capacitor array circuit of claim 18 , further comprising:
a plurality of unit capacitors respectively included in the plurality of discrete capacitance switching circuits,
wherein the unit capacitor is one of the plurality of unit capacitors, and the unit capacitors have different capacitance values.

Assignees

• Samsung Electronics Co Ltd
• Korea Advanced Inst Sci & Tech

Inventors

• Kim Jin-Ho
• Kim Hyun-Bae
• Kim Keon-Woo
• Moon Gun-Woo
• Park Moo-Hyun
• Baek Jae-Il

Classifications

• H01J37/32091 Primary

  the radio frequency energy being capacitively coupled to the plasma · CPC title

• H03H19/004 Primary

  Switched capacitor networks · CPC title

• H03H11/28

  Impedance matching networks · CPC title

• H01J37/32183

  Matching circuits · CPC title

• H03H5/12

  with at least one voltage- or current-dependent element · CPC title