Background flash offset calibration in continuous-time delta-sigma ADCS
US-9843337-B1 · Dec 12, 2017 · US
US10790840B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10790840-B2 |
| Application number | US-201916684263-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 14, 2019 |
| Priority date | Nov 15, 2018 |
| Publication date | Sep 29, 2020 |
| Grant date | Sep 29, 2020 |
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Analog-to-digital converter (ADC) circuitry to convert an analog signal to a digital signal is disclosed herein. The ADC circuitry can utilize pipelined-interpolation analog-to-digital converters (PIADCs) with adaptation circuitry to correct regenerative amplification cells of the PIADCs. The PIADCs can implement a rotational shuffling scheme for correction of the regenerative amplification cells, where the correction implemented by the regenerative amplification cells allows for offsetting of latches of the regenerative amplification cells.
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What is claimed is: 1. A pipelined-interpolating analog-to-digital converter (PIADC), comprising: a plurality of nodes to receive a combined signal having an analog input signal and a dither signal, wherein the plurality of nodes includes: a first node to output a first difference between a first selected value and the combined signal on a first output of the plurality of nodes; a second node to output a second difference between a second selected value and the combined signal on a second output of the plurality of nodes; and a third node to output a third difference between a third selected value and the combined signal on a third output of the plurality of nodes, wherein the first selected value, the second selected value, and the third selected value are selected from a set of unique values based on a rotational shuffling scheme and the dither signal; and a tree of regenerative amplification cells coupled to the first output, the second output, and the third output of the plurality of nodes, wherein the tree is to produce a thermometer code word corresponding to the combined signal, wherein the tree is to receive an indication whether any of the regenerative amplification cells are to be corrected based on the thermometer code word. 2. The PIADC of claim 1 , wherein the first selected value is selected from the set of unique values for the first node based on the dither signal, the second selected value is selected from the set of unique values for the second node based on the dither signal, and wherein the third selected value is selected from the set of unique values for the third node based on the dither signal. 3. The PIADC of claim 1 , wherein a value of the thermometer code word is determined based on a transition point of outputs of the tree that form the thermometer code word, wherein each output of the outputs of the tree corresponds to corresponding nodes of the plurality of nodes, wherein a first end node and a second end node are identified based on a difference between selected values provided to the first end node and the second end node being equal to a difference between a highest value and a lowest value from the set of unique values, and wherein each output corresponding to the first end node and the second end node are ignored for identification of the transition point for determination of the value of the thermometer code word. 4. The PIADC of claim 1 , wherein the tree of regenerative amplification cells includes a first layer of regenerative amplification cells and a second layer of regenerative amplification cells, and wherein each regenerative amplification cell in the first layer is coupled to three regenerative amplification cells in the second layer. 5. The PIADC of claim 1 , wherein the rotational shuffling scheme causes different values to be provided to each node within the plurality of nodes, and wherein the values provided to each node within the plurality of nodes is determined based on the dither signal. 6. The PIADC of claim 5 , wherein the set of unique values includes a plurality of values that are consecutive, wherein the first node is adjacent to the second node within the plurality of nodes, and wherein the first selected value and the second selected value are consecutive values with the plurality of values. 7. The PIADC of claim 1 , wherein the thermometer code word includes an imprecise transition point, and wherein the indication whether any of the regenerative amplification cells are to be corrected comprises an indication that at least one of the regenerative amplification cells is to be corrected to correct the imprecise transition point to a precise transition point. 8. The PIADC of claim 1 , wherein the thermometer code word is utilized to produce a first digital representation of the analog input signal, and wherein the indication whether any of the regenerative amplification cells are to be corrected comprises an indication that at least one of the regenerative amplification cells is to be corrected based on the first digital representation of the analog input signal being different than a second digital representation of the analog input signal. 9. The PIADC of claim 1 , wherein the indication whether any of the regenerative amplification cells are to be corrected comprises an indication that a regenerative amplification cell within the tree of regenerative amplification cells is to be corrected, and wherein a first current source and a second current source of the regenerative amplification cell are offset in response to the indication that the regenerative amplification cell is to be corrected. 10. Analog-to-digital converter (ADC) circuitry, comprising: a pipelined-interpolating analog-to-digital converter (PIADC); addition circuitry coupled to an input of the PIADC, the addition circuitry to sum an analog input signal and a dither signal to produce a combined signal and to provide the combined signal to the input of the PIADC; subtraction circuitry coupled to an output of the PIADC, the subtraction circuitry to subtract the dither signal from an output signal on the output of the PIADC to produce a digital representation of the analog input signal; a plurality of nodes, wherein each node of the plurality of nodes is to output a difference between the combined signal and a received selected value, and wherein the dither signal determines selected values via a rotational shuffling scheme to be provided to each node of the plurality of nodes; and a tree of regenerative amplification cells coupled to the plurality of nodes, the tree of regenerative amplification cells to receive outputs of the plurality of nodes and produce a thermometer code word corresponding to the analog input signal. 11. The ADC circuitry of claim 10 , wherein the addition circuitry utilizes an analog representation of the dither signal to sum the analog input signal with the dither signal, and wherein the subtraction circuitry utilizes a digital representation of the dither signal to subtract the dither signal from the output signal. 12. The ADC circuitry of claim 10 , wherein the selected values to be provided to each node of the plurality of nodes are selected from a set of unique values, and wherein each node of the plurality of nodes receives a different selected value from other nodes of the plurality of nodes. 13. The ADC circuitry of claim 10 , wherein the digital representation of the analog input signal is a first digital representation of the analog input signal, and wherein the ADC circuitry further comprises background adaptation circuitry coupled to the PIADC, the background adaptation circuitry to receive a result of a comparison between the first digital representation of the analog input signal and a second digital representation of the analog input signal, and to provide an indication whether any of the regenerative amplification cells of the PIADC are to be corrected based on the result of the comparison between the first digital representation of the analog input signal and the second digital representation of the analog input signal. 14. The ADC circuitry of claim 13 , wherein the PIADC is a first PIADC, wherein the dither signal is a first dither signal, wherein the addition circuitry is a first addition circuitry, wherein the subtraction circuitry is a first subtraction, wherein the combined signal is a first combined signal, wherein the output signal is a first output signal and wherein the PIADC circuitry further comprises: a second PIADC; second addition circuitry coupled to the input of the second PIADC, the second addition circuitry to sum the analog input signal and a second dither signal
using additional components or elements, e.g. dummy components · CPC title
using different permutation circuits for different parts of the digital signal · CPC title
using dither, e.g. using triangular or sawtooth waveforms (for increasing resolution H03M1/201) · CPC title
of deviations from the desired transfer characteristic (H03M1/0617 takes precedence) · CPC title
by dithering · CPC title
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