X-ray detector substrate based on photodiodes with a radial pin junction structure

Patent metadata

Field	Value
Publication number	US-10784305-B2
Application number	US-201715768229-A
Country	US
Kind code	B2
Filing date	Sep 28, 2017
Priority date	Apr 18, 2017
Publication date	Sep 22, 2020
Grant date	Sep 22, 2020

Abstract

The present application discloses a photodiode structure including multiple light trapping elements. Each light trapping element includes an N-type silicon layer with a recessed structure therein, an intrinsic silicon layer disposed overlying the N-type silicon layer including a side region and a bottom region inside the recessed structure, and a P-type silicon layer disposed as an inner layer overlying the intrinsic silicon layer inside the recessed structure. A radial PIN junction is formed around a nominal axis of the recessed structure.

First claim

What is claimed is:

1. A photodiode structure comprising multiple light trapping elements, each light trapping element comprising an N-type silicon layer with a recessed structure therein, an intrinsic silicon layer overlying the N-type silicon layer including a side region and a bottom region inside the recessed structure, and a P-type silicon layer as an inner layer overlying the intrinsic silicon layer inside the recessed structure, forming a radial PIN junction around a nominal axis of the recessed structure.

2. The photodiode structure of claim 1 , wherein the multiple light trapping elements are arranged periodically.

3. The photodiode structure of claim 2 , wherein the N-type silicon layer of each of the multiple light trapping elements is one physical layer with multiple recessed structures patterned therein substantially perpendicular to a base substrate.

4. The photodiode structure of claim 1 , wherein each recessed structure is a cylindrical shape with a hollow cylinder structure around the nominal axis surrounded by the P-type silicon layer.

5. The photodiode structure of claim 4 , wherein the N-type silicon layer comprises a thickness in a proximate range from 800 nm to 1200 nm and a depth of each recessed structure in a proximate range from 700 nm to 1100 nm, each recessed structure has a diameter of proximately 1200 nm to 1800 nm, and two adjacent recessed structures has a distance of proximately 1300 nm to 2000 nm.

6. The photodiode structure of claim 1 , wherein the intrinsic silicon layer comprises a thickness of proximately 200 nm to 300 nm.

7. The photodiode structure of claim 1 , wherein the P-type silicon layer comprises a thickness of proximately 15 nm to 40 nm.

8. An X-ray detector panel comprising a substrate, a photodiode structure of claim 1 disposed on the substrate, multiple thin-film transistors disposed between the photodiode structure and the substrate, and multiple electric current extracting devices disposed on the photodiode structure; wherein each of the multiple thin-film transistor includes a drain terminal coupled to the N-type silicon layer of a corresponding one of the multiple light trapping elements and each of the multiple electric current extracting device is coupled to the P-type silicon layer of the corresponding one of the multiple light trapping elements.

9. The X-ray detector panel of claim 8 , wherein each of the multiple electric current extracting devices includes a first transparent electrode layer disposed on the photodiode structure, a passivation layer overlying the first transparent electrode layer, a second transparent electrode layer overlying the passivation layer and connecting to the first transparent electrode layer by filling a through-hole penetrating the passivation layer, a conductor metal layer overlying the second transparent electrode layer, and a protection layer overlying the conductor metal layer.

10. The X-ray detector panel of claim 9 , wherein the through-hole penetrating the passivation layer is formed at a region between two adjacent radial PIN junctions.

11. A photodiode structure comprising multiple light trapping elements, each light trapping element comprising an N-type silicon layer with protruded structure thereon, an intrinsic silicon layer disposed overlying the N-type silicon layer including a side region and a top region of the protruded structure, and a P-type silicon layer disposed as an outer layer overlying the intrinsic silicon layer around the protruded structure, forming a radial PIN junction around a nominal axis of the protruded structure substantially perpendicular to a base substrate.

12. The photodiode structure of claim 11 , wherein each protruded structure is a cylindrical shape around the nominal axis surrounded firstly by the intrinsic silicon layer and secondly by the P-type silicon layer.

13. The photodiode structure of claim 12 , wherein the N-type silicon layer of each of the multiple light trapping elements is one physical layer having a thickness of proximately 15 nm to 40 nm and multiple protruded structure formed thereon, the protruded structure has a height in a proximate range from 800 nm to 1100 nm and a diameter in a proximate range of from 25 nm to 50 nm, two adjacent protruded structure has a distance of proximately 1300 nm to 2000 nm, the intrinsic silicon layer comprises a thickness of proximately 200 nm to 300 nm, and the P-type silicon layer comprises a thickness of proximately 15 nm to 40 nm.

14. An X-ray detector substrate comprising a substrate, a photodiode structure of claim 11 disposed on the substrate, multiple thin-film transistors disposed between the photodiode structure and the substrate, and multiple electric current extracting devices disposed on the photodiode structure; wherein each of the multiple thin-film transistor includes a drain or source terminal coupled to the N-type silicon layer of a corresponding one of the multiple light trapping elements and each of the multiple electric current extracting device is coupled to the P-type silicon layer of the corresponding one of the multiple light trapping elements.

15. The X-ray detector substrate of claim 14 , wherein each of the multiple electric current extracting devices includes a first transparent electrode layer disposed on the photodiode structure, a passivation layer overlying the first transparent electrode layer, a second transparent electrode layer overlying the passivation layer and connecting to the first transparent electrode layer by filling a through-hole penetrating the passivation layer, a conductor metal layer overlying the second transparent electrode layer, and a protection layer overlying the conductor metal layer.

16. The X-ray detector substrate of claim 15 , wherein the through-hole penetrating the passivation layer is formed on top of each radial PIN junction.

17. A method of fabricating a photodiode structure of claim 11 , comprising:
forming an N-type silicon layer on a substrate;
forming multiple protruded structures in N-type silicon material on the N-type silicon layer;
forming an intrinsic silicon layer overlying the N-type silicon material including a side region and a top region of each of the multiple protruded structures;
forming a P-type silicon layer as an outer layer overlying the intrinsic silicon layer; wherein a radial PIN junction is formed around a nominal axis of each of the multiple protruded structures.

18. A method of fabricating an X-ray detector substrate comprising a substrate, a photodiode structure disposed on the substrate, multiple thin-film transistors disposed between the photodiode structure and the substrate, and multiple electric current extracting devices disposed on the photodiode structure; wherein each of the multiple thin-film transistor includes a drain or source terminal coupled to the N-type silicon layer of a corresponding one of multiple light trapping elements and each of the multiple electric current extracting device is coupled to the P-type silicon layer of the corresponding one of the multiple light trapping elements,
wherein the photodiode structure comprising multiple light trapping elements, each light trapping element comprising an N-type silicon layer with protruded structure thereon, an intrinsic silicon layer disposed overlying the N-type silicon layer including a side region and a top region of the protruded structure, and a P-type silicon layer disposed as an outer layer overlying the intrinsic silicon layer around the protruded structure, forming a radial PIN junction around a nominal axis of the protruded

Assignees

• Boe Technology Group Co Ltd

Inventors

• Huang Rui
• Sun Jianming

Classifications

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title

• H10D30/0312

  characterised by the gate electrodes · CPC title

• H10D30/6746

  Amorphous silicon · CPC title

• H10D30/6732

  Bottom-gate only TFTs · CPC title

• H10D30/0316

  of lateral bottom-gate TFTs comprising only a single gate · CPC title