Multi-chip module package compact thermal models
US-10409358-B1 · Sep 10, 2019 · US
US10783303B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10783303-B2 |
| Application number | US-201816000888-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 6, 2018 |
| Priority date | Jun 6, 2017 |
| Publication date | Sep 22, 2020 |
| Grant date | Sep 22, 2020 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Various aspects of a technology disclosed herein relate to thermal model obfuscation. A thermal model for a first assembly is received. An obfuscated thermal model is then generated from the thermal model. The generation comprises replacing name or names associated with one or more objects in the first assembly with obfuscated names. The obfuscated thermal model can be used in a thermal simulation of a second assembly, of which the first assembly is a component.
Opening claim text (preview).
What is claimed is: 1. A method, executed by at least one processor of a computer, comprising: receiving a thermal model for a first assembly; generating an obfuscated thermal model from the thermal model, wherein the generating comprises: replacing name or names associated with one or more objects in the first assembly with obfuscated names, and removing annotations in the thermal model; and storing the obfuscated thermal model for being used in a thermal simulation of a second assembly, of which the first assembly is a component. 2. The method recited in claim 1 , further comprising: performing the thermal simulation on the second assembly based on the obfuscated thermal model. 3. The method recited in claim 1 , further comprising: storing information of the thermal model and information of the obfuscated thermal model in a cross-referenced way. 4. The method recited in claim 1 , wherein the generating further comprises: varying one or more parameters in the thermal model within a predetermined range. 5. The method recited in claim 1 , wherein the generating further comprises: varying two or more parameters in the thermal model such that effects on thermal properties are cancelled out. 6. The method recited in claim 1 , wherein the first assembly is a chip package. 7. One or more non-transitory computer-readable media storing computer-executable instructions for causing one or more processors to perform a method, the method comprising: receiving a thermal model for a first assembly; generating an obfuscated thermal model from the thermal model, wherein the generating comprises: replacing name or names associated with one or more objects in the first assembly with obfuscated names, removing annotations in the thermal model; and storing the obfuscated thermal model for being used in a thermal simulation of a second assembly, of which the first assembly is a component. 8. The one or more non-transitory computer-readable media recited in claim 7 , wherein the method further comprises: performing the thermal simulation on the second assembly based on the obfuscated thermal model. 9. The one or more non-transitory computer-readable media recited in claim 7 , wherein the method further comprises: storing information of the thermal model and information of the obfuscated thermal model in a cross-referenced way. 10. The one or more non-transitory computer-readable media recited in claim 7 , wherein the generating further comprises: varying one or more parameters in the thermal model within a predetermined range. 11. The one or more non-transitory computer-readable media recited in claim 7 , wherein the generating further comprises: varying two or more parameters in the thermal model such that effects on thermal properties are cancelled out. 12. The one or more non-transitory computer-readable media recited in claim 7 , wherein the first assembly is a chip package. 13. A system, comprising: one or more processors, the one or more processors programmed to perform a method, the method comprising: receiving a thermal model for a first assembly; generating an obfuscated thermal model from the thermal model, wherein the generating comprises: replacing name or names associated with one or more objects in the first assembly with obfuscated names, removing annotations in the thermal model; and storing the obfuscated thermal model for being used in a thermal simulation of a second assembly, of which the first assembly is a component. 14. The system recited in claim 13 , wherein the method further comprises: performing the thermal simulation on the second assembly based on the obfuscated thermal model. 15. The system recited in claim 14 , wherein the method further comprises: storing information of the thermal model and information of the obfuscated thermal model in a cross-referenced way. 16. The system recited in claim 14 , wherein the generating further comprises: varying one or more parameters in the thermal model within a predetermined range. 17. The system recited in claim 14 , wherein the generating further comprises: varying two or more parameters in the thermal model such that effects on thermal properties are cancelled out.
Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods · CPC title
using formal methods, e.g. equivalence checking or property checking · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.