Apparatus and methods for determining data states of memory cells

Patent metadata

Field	Value
Publication number	US-10777286-B2
Application number	US-201916267488-A
Country	US
Kind code	B2
Filing date	Feb 5, 2019
Priority date	Dec 28, 2018
Publication date	Sep 15, 2020
Grant date	Sep 15, 2020

Abstract

Methods of operating a memory, and memory configured to perform similar methods, might include sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, ceasing increasing the voltage level applied to each access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having a particular condition, changing a voltage level applied to a particular access line of the plurality of access lines to a particular voltage level, and sensing a state of each data line of a subset of the plurality of data lines while applying the particular voltage level to the particular access line.

First claim

What is claimed is:

1. A method of operating a memory, comprising:
sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, wherein each string of series-connected memory cells corresponds to a respective data line of the plurality of data lines;
for each access line of the plurality of access lines, ceasing increasing the voltage level applied to that access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having a particular condition;
after ceasing increasing the voltage level applied to a particular access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having the particular condition, changing a voltage level applied to the particular access line to a particular voltage level; and
sensing a state of each data line of a subset of the plurality of data lines while applying the particular voltage level to the particular access line.

2. A method of operating a memory, comprising:
sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, wherein each string of series-connected memory cells corresponds to a respective data line of the plurality of data lines;
ceasing increasing the voltage level applied to each access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having a particular condition;
changing a voltage level applied to a particular access line of the plurality of access lines to a particular voltage level; and
sensing a state of each data line of a subset of the plurality of data lines while applying the particular voltage level to the particular access line;
wherein changing the voltage level applied to the particular access line comprises decreasing the voltage level applied to the particular access line.

3. A method of operating a memory, comprising:
sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, wherein each string of series-connected memory cells corresponds to a respective data line of the plurality of data lines;
for each access line of the plurality of access lines, ceasing increasing the voltage level applied to that access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having a particular condition;
changing a voltage level applied to a particular access line of the plurality of access lines to a particular voltage level; and
sensing a state of each data line of a subset of the plurality of data lines while applying the particular voltage level to the particular access line;
wherein changing the voltage level applied to the particular access line occurs without decreasing the voltage level applied to each remaining access line of the plurality of access lines.

4. A method of operating a memory, comprising:
sensing a state of each data line of a plurality of data lines while increasing a voltage level applied to each access line of a plurality of access lines commonly connected to a plurality of strings of series-connected memory cells, wherein each string of series-connected memory cells corresponds to a respective data line of the plurality of data lines;
determining a voltage level at which the state of each data line of the plurality of data lines has the particular condition;
storing a representation of the voltage level at which the state of each data line of the plurality of data lines has the particular condition;
ceasing increasing the voltage level applied to each access line of the plurality of access lines in response to the state of each data line of the plurality of data lines having a particular condition;
changing a voltage level applied to a particular access line of the plurality of access lines to a particular voltage level; and
sensing a state of each data line of a subset of the plurality of data lines while applying the particular voltage level to the particular access line.

5. The method of claim 4 , wherein the voltage level at which the state of each data line of the plurality of data lines has the particular condition is a second voltage level, the method further comprising:
decreasing the voltage level applied to each access line of the plurality of access lines to a reference potential;
after decreasing the voltage level applied to each access line of the plurality of access lines to the reference potential, increasing the voltage level applied to each access line of the plurality of access lines to the second voltage level;
changing a voltage level applied to a different access line of the plurality of access lines, different than the particular access line, to the particular voltage level; and
sensing a state of each data line of the subset of the plurality of data lines while applying the particular voltage level to the different access line.

6. The method of claim 4 , wherein the voltage level at which the state of each data line of the plurality of data lines has the particular condition is a second voltage level, the method further comprising:
decreasing the voltage level applied to each access line of the plurality of access lines to a reference potential;
after decreasing the voltage level applied to each access line of the plurality of access lines to the reference potential, increasing a voltage level applied to each access line of a different plurality of access lines to the second voltage level, wherein each access line of the different plurality of access lines is commonly connected to a different plurality of strings of series-connected memory cells, and wherein each string of series-connected memory cells of the different plurality of strings of series-connected memory cells corresponds to a respective data line of the plurality of data lines;
changing a voltage level applied to a particular access line of the different plurality of access lines to the particular voltage level; and
sensing a state of each data line of the subset of the plurality of data lines while applying the particular voltage level to the particular access line of the different plurality of access lines.

7. The method of claim 4 , wherein the voltage level at which the state of each data line of the plurality of data lines has the particular condition is a second voltage level, the method further comprising:
decreasing the voltage level applied to each access line of the plurality of access lines to a reference potential;
after decreasing the voltage level applied to each access line of the plurality of access lines to the reference potential, increasing a voltage level applied to each access line of the plurality of access lines to the second voltage level, wherein each access line of the plurality of access lines is further commonly connected to a different plurality of strings of series-connected memory cells, and wherein each string of series-connected memory cells of the different plurality of strings of series-connected memory cells corresponds to a respective data line of a different plurality of data lines;
changing the voltage level applied to the particular access line of the plurality of access lines to the particular voltage level; and
sensing a state of each data line of a subset of the different plurality of data lines

Assignees

• Micron Technology Inc

Inventors

• Moschiano Violante
• Ghilardi Tecla
• Vali Tommaso
• Camerlenghi Emilio
• Filipiak William C
• D'Alessandro Andrea

Classifications

• G11C16/0483 Primary

  comprising cells having several storage transistors connected in series · CPC title

• G11C16/26 Primary

  Sensing or reading circuits; Data output circuits · CPC title

• G11C16/30

  Power supply circuits · CPC title

• G06F3/0619

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G11C16/3459

  Circuits or methods to verify correct programming of nonvolatile memory cells · CPC title