High speed thin film two terminal resistive memory

US10777267B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10777267-B2
Application numberUS-201815864148-A
CountryUS
Kind codeB2
Filing dateJan 8, 2018
Priority dateJan 8, 2018
Publication dateSep 15, 2020
Grant dateSep 15, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A battery article of manufacture comprises a plurality of components operatively associated with one another, the plurality of components comprising an electrode comprised of a material that can take up ions and discharge ions in a charging and discharging process, an electrolyte comprised of the ions, the article of manufacture also including a component comprising at least one barrier positioned between the electrolyte and the electrode, the barrier comprised of a material that substantially prevents the ions from combining with the electrode and having a structure that substantially prevents the ions from combining with the electrode, but allows the ions to travel toward or away from the electrode in the charging or discharging process.

First claim

Opening claim text (preview).

We claim: 1. A battery-based resistive memory article of manufacture comprising a plurality of components operatively associated with one another, said plurality of components comprising an electrode comprised of a material that can take up ions and discharge ions in a charging and discharging process, an electrolyte comprised of said ions, said article of manufacture also including a component comprising at least one barrier positioned between said electrolyte and said electrode, said barrier comprised of a material that substantially prevents said ions from combining with said electrode and having a structure that substantially prevents said ions from combining with said electrode, but allows said ions to travel toward or away from said electrode in said charging or discharging process, a location of said ions indicating a data value stored by said battery-based resistive memory article of manufacture. 2. A battery-based resistive memory article of manufacture comprising a plurality of components operatively associated with one another, said plurality of components comprising at least one first electrode and at least one second electrode, said first electrode and said second electrode selected from at least one cathode and at least one anode, said cathode and said anode each comprised of a material that can take up ions and discharge ions in a charging and discharging process, an electrolyte between said electrodes, said electrolyte comprised of said ions, said article of manufacture also including a component comprising at least one barrier positioned between said electrolyte and at least one of said electrodes, said barrier comprised of a material that substantially prevents said ions from combining with at least one of said electrodes and having a structure that substantially prevents said ions from combining with at least one of said electrodes, but allows said ions to travel toward or away from one said electrode to the other said electrode in said charging or discharging process, a location of said ions indicating a data value stored by said battery-based resistive memory article of manufacture. 3. The article of manufacture of claim 1 wherein each ion is comprised of an alkali metal cation. 4. The article of manufacture of claim 2 wherein each ion is comprised of an alkali metal cation. 5. The article of manufacture of claim 1 wherein said electrode comprises an LCO cathode. 6. The article of manufacture of claim 2 wherein said electrode comprises an LCO cathode. 7. The article of manufacture of claim 1 wherein said barrier is comprised of a Group IIIA element. 8. The article of manufacture of claim 1 wherein said barrier is comprised of aluminum. 9. The article of manufacture of claim 2 wherein said barrier is comprised of a Group IIIA element. 10. The article of manufacture of claim 2 wherein said barrier is comprised of aluminum. 11. The article of manufacture of claim 1 wherein said barrier is comprised of a Group IVB element. 12. The article of manufacture of claim 1 wherein said barrier is comprised of a Group VB element. 13. The article of manufacture of claim 2 wherein said barrier is comprised of a Group IVB element. 14. The article of manufacture of claim 2 wherein said barrier is comprised of a Group VB element. 15. The article of manufacture of claim 1 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory. 16. The article of manufacture of claim 1 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a computing circuit. 17. The article of manufacture of claim 1 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a variable resistance computing circuit. 18. The article of manufacture of claim 1 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a neuromorphic computing circuit. 19. The article of manufacture of claim 1 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a memristor computing circuit. 20. The article of manufacture of claim 2 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory. 21. The article of manufacture of claim 2 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a computing circuit. 22. The article of manufacture of claim 2 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a variable resistance computing circuit. 23. The article of manufacture of claim 2 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a neuromorphic computing circuit. 24. The article of manufacture of claim 2 configured to comprise a chargeable and dischargeable variable resistance high speed thin film two terminal resistive battery memory operatively associated with a memristor computing circuit. 25. The article of manufacture of claim 1 , wherein a movement of said ions from one of said electrodes toward another of said electrodes occurs during said charging process and said discharging process, wherein said charging and discharging processes function to provide write-erase configurations of the battery-based resistive memory article of manufacture, and wherein said article of manufacture is configurable to operate in an array of a plurality of battery-based resistive memory devices.

Assignees

Inventors

Classifications

  • Ceramics · CPC title

  • Manufacturing or production processes characterised by the final manufactured product · CPC title

  • as layered products · CPC title

  • RRAM elements whose operation depends upon chemical change · CPC title

  • Resistive cell, memory material aspects · CPC title

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Frequently asked questions

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What does patent US10777267B2 cover?
A battery article of manufacture comprises a plurality of components operatively associated with one another, the plurality of components comprising an electrode comprised of a material that can take up ions and discharge ions in a charging and discharging process, an electrolyte comprised of the ions, the article of manufacture also including a component comprising at least one barrier positio…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G11C13/0009. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Sep 15 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).