Apparatus and method for an all-digital phase lock loop

Patent metadata

Field	Value
Publication number	US-10771234-B2
Application number	US-201816146355-A
Country	US
Kind code	B2
Filing date	Sep 28, 2018
Priority date	Sep 28, 2018
Publication date	Sep 8, 2020
Grant date	Sep 8, 2020

Abstract

In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive an otw signal that is associated with low-path pass information and transmission data. The apparatus may apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator. The apparatus may determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function.

First claim

What is claimed is:

1. A method of wireless communication of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising:
receiving an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
applying a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator; and
determining a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function,
wherein the applying the cost function to the otw signal comprises:
removing a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
determining a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
selecting a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
determining a peak value associated with the otw signal or an anti-peak value associated with the otw signal; and
sending one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

2. The method of claim 1 , wherein the applying the update function to the otw signal comprises:
removing a bias from the PAR;
applying a gain factor to the PAR upon removing the bias;
integrating at least a portion of the PAR upon applying the gain factor; and
applying the bias to the PAR to obtain the output of the PAR.

3. An apparatus for wireless communication of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising:
means for receiving an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
means for applying a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator; and
means for determining a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function;
wherein the means for applying the cost function to the otw signal is configured to:
remove a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
determine a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
select a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
determine a peak value associated with the otw signal or an anti-peak value associated with the otw signal; and
send one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

4. The apparatus of claim 3 , wherein the means for applying the update function to the otw signal is configured to:
remove a bias from the PAR;
apply a gain factor to the PAR upon removing the bias;
integrate at least a portion of the PAR upon applying the gain factor; and
apply the bias to the PAR to obtain the output of the PAR.

5. The apparatus of claim 4 , further comprising:
means for determining a calibrated oscillator gain based at least in part on the correction factor; and
means for modulating, using the oscillator, the data transmission based at least in part on the calibrated oscillator gain; and
means for transmitting the modulated data transmission to a second wireless device.

6. An apparatus for wireless communication of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising:
receive an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator; and
determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function,
wherein the at least one processor is configured to apply the cost function to the otw signal by:
removing a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
determining a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
selecting a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
determining a peak value associated with the otw signal or an anti-peak value associated with the otw signal; and
sending one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

7. The apparatus of claim 6 , wherein the at least one processor is configured to apply the update function to the otw signal by:
removing a bias from the PAR;
applying a gain factor to the PAR upon removing the bias;
integrating at least a portion of the PAR upon applying the gain factor; and
applying the bias to the PAR to obtain the output of the PAR.

8. A non-transitory computer-readable medium storing computer executable code of a first wireless device that includes an all-digital phase lock loop (ADPLL), comprising code to:
receive an oscillator tuning word (otw) signal that is associated with low-path pass information and transmission data;
apply a cost function and an update function to the otw signal prior to sending the otw signal to an oscillator; and
determine a correction factor for use in estimating a gain of the oscillator based at least in part on an output of the update function,
wherein the code to apply the cost function to the otw signal is configured to:
remove a direct current (DC) portion of the otw signal to obtain an analog-current (AC) portion of the otw signal;
determine a peak-to-average ratio (PAR) associated with the AC portion of the otw signal and an anti-PAR ratio associated with the AC portion of the otw signal;
select a metric for use by the update function based at least in part on the PAR ratio and the anti-PAR ratio of the otw signal;
determine a peak value associated with the otw signal or an anti-peak value associated with the otw signal; and
send one or more of the metric, the PAR, the anti-PAR, the peak value, or the anti-peak value associated with the otw signal to the update function.

9. The non-transitory computer-readable medium of claim 8 , wherein the code to apply the update function to the otw signal is configured to:
remove a bias from the PAR;
apply a gain factor to the PAR upon removing the bias;
integrate at least a portion of the PAR upon applying the gain factor; and
apply the bias to the PAR to obtain the output of the PAR.

Assignees

• Qualcomm Inc

Inventors

• Lopelli Emanuele
• Wiklund Magnus Olov
• Wang Charles Chang-I
• Pennisi Salvatore
• Mcconnell Richard

Classifications

• H04B1/40 Primary

  Circuits · CPC title

• H04L7/06 Primary

  the synchronisation signals differing from the information signals in amplitude, polarity or frequency {or length} · CPC title

• H04W56/001

  Synchronization between nodes · CPC title

• H04L7/0091

  Transmitter details · CPC title

• H03C3/0941

  applying frequency modulation at more than one point in the loop · CPC title