Multi-level DC-DC converter with lossless voltage balancing

Patent metadata

Field	Value
Publication number	US-10770974-B2
Application number	US-201916249805-A
Country	US
Kind code	B2
Filing date	Jan 16, 2019
Priority date	Jan 16, 2019
Publication date	Sep 8, 2020
Grant date	Sep 8, 2020

Abstract

Multi-level DC-to-DC converter circuits and methods that permit a full range of output voltages, including near and at zone boundaries. Embodiments alternate among adjacent or near-by zones, operating in a first zone for a selected time and then in a second zone for a selected time. Embodiments may include a parallel capacitor voltage balancing circuit that connects a capacitor to a source voltage to charge that capacitor, or couples two or more capacitors together to transfer charge, all under the control of real-time capacitor voltage measurements. Embodiments may include a lossless voltage balancing solution where out-of-order state transitions are allowed, thus increasing or decreasing the voltage across specific capacitors to prevent voltage overstress on the converter main switches. Restrictions may be placed on the overall sequence of state transitions to reduce or avoid transition state toggling, allowing each capacitor an opportunity to have its voltage steered as necessary for balancing.

First claim

What is claimed is:

1. A multi-level DC-to-DC converter circuit for converting an input voltage to an output voltage, including:
(a) a plurality of series-coupled main switches;
(b) an inductor coupled to a node within the plurality of series-coupled main switches;
(c) at least one capacitor coupled in parallel with the plurality of series-coupled main switches and selectively couplable to the inductor, a voltage source, and/or a voltage sink through the plurality of series-coupled main switches;
(d) a control circuit coupled to the plurality of series-coupled main switches and configured to set states for the plurality of series-coupled main switches in at least two patterns defining respective zones having a corresponding range of output voltages, at least one pattern having forward order transition state changes; and
(e) a directional correction circuit, coupled to at least one capacitor and to the control circuit, configured to sense deviations in a voltage across at least one coupled capacitor and generate corresponding directional correction signals that, alone or in combination, force at least one pattern to a backward out-of-order transition state change so as to selectively steer the voltage across the at least one coupled capacitor towards a balanced voltage state.

2. The invention of claim 1 , wherein the multi-level DC-to-DC converter circuit is one of a buck-boost or a boost or a buck multi-level DC-to-DC converter circuit.

3. The invention of claim 1 , wherein each pattern consists of a cycle of forward order transition state changes, and backward out-of-order of transition state changes are limited to a selected number per cycle.

4. The invention of claim 1 , wherein each pattern consists of a cycle of forward order transition state changes, and consecutive backward out-of-order of transition state changes are limited to a selected number per cycle.

5. The invention of claim 1 , wherein each pattern consists of a cycle of forward order transition state changes, and backward out-of-order of transition state changes are limited to a selected number per cycle as a function of an electrical load on the multi-level DC-to-DC converter circuit.

6. The invention of claim 1 , wherein each pattern consists of a cycle of forward order transition state changes, and consecutive backward out-of-order of transition state changes are limited to a selected number per cycle as a function of an electrical load on the multilevel DC-to-DC converter circuit.

7. The invention of claim 1 , wherein each zone is separated with respect to at least one zone by a boundary zone, and wherein the control circuit is further configured to set states for the plurality of series-coupled main switches in a boundary zone transition pattern that generates output voltages within one or more of the boundary zones.

8. A multi-level DC-to-DC converter circuit for converting an input voltage to an output voltage, including:
(a) a switch path including a first set of series-coupled switches coupled in series with a second set of series-coupled switches, wherein each pair of switches in the first set of series-coupled switches and in the second set of series-coupled switches is separated by a respective node;
(b) an inductor having a first terminal coupled between the first set of series-coupled switches and the second set of series-coupled switches, and a second terminal configurable as an input, or an output, or a shunt to circuit ground;
(c) for corresponding nodes in the first set and second set of series-coupled switches, a corresponding capacitor coupling the corresponding node in the first set of series-coupled switches to the corresponding node in the second set of series-coupled switches;
(d) a control circuit, coupled to individual switches in the first set and second set of series-coupled switches, configured to set states for the coupled individual switches in at least two patterns defining respective zones having a corresponding range of output voltages at the voltage output, at least one pattern having forward order transition state changes; and
(e) a directional correction circuit, coupled to at least one capacitor and to the control circuit, configured to sense deviations in a voltage across at least one coupled capacitor and generate corresponding directional correction signals that, alone or in combination, force at least one pattern to a backward out-of-order transition state change so as to selectively steer the voltage across the at least one coupled capacitor towards a voltage balanced state.

9. The invention of claim 8 , wherein the multi-level DC-to-DC converter circuit is one of a buck-boost or a boost or a buck multi-level DC-to-DC converter circuit.

10. The invention of claim 8 , wherein each pattern consists of a cycle of forward order transition state changes, and backward out-of-order of transition state changes are limited to a selected number per cycle.

11. The invention of claim 8 , wherein each pattern consists of a cycle of forward order transition state changes, and consecutive backward out-of-order of transition state changes are limited to a selected number per cycle.

12. The invention of claim 8 , wherein each pattern consists of a cycle of forward order transition state changes, and backward out-of-order of transition state changes are limited to a selected number per cycle as a function of an electrical load on the multi-level DC-to-DC converter circuit.

13. The invention of claim 8 , wherein each pattern consists of a cycle of forward order transition state changes, and consecutive backward out-of-order of transition state changes are limited to a selected number per cycle as a function of an electrical load on the multi-level DC-to-DC converter circuit.

14. The invention of claim 8 , wherein each zone is separated with respect to at least one zone by a boundary zone, and wherein the control circuit is further configured to set states for the coupled individual switches in a boundary zone transition pattern that generates output voltages within one or more of the boundary zones.

15. A method for balancing capacitor voltages in a multi-level DC-to-DC converter circuit for converting an input voltage to an output voltage, the multi-level DC-toDC converter circuit including an inductor, at least one capacitor selectively couplable to the inductor, a voltage source, and/or a voltage sink through a plurality of series-coupled switches, and a control circuit configured to set states for the series-coupled switches in at least two patterns defining respective zones having a corresponding range of output voltages, at least one pattern having forward order transition state changes, the method including:
(a) sensing deviations in a voltage across at least one coupled capacitor;
(b) generating directional correction signals corresponding to the sensed deviations; and
(c) applying the generated directional correction signals, alone or in combination, to force at least one pattern to a backward out-of-order transition state change so as to selectively steer the voltage across the at least one coupled capacitor towards a balanced voltage state.

16. The method of claim 15 , wherein the multi-level DC-to-DC converter circuit is one of a buck-boost or a boost or a buck multi-level DC-to-DC converter circuit.

17. The method of claim 15 , wherein each pattern consists of a cycle of forward order transition state changes, further including limiting backward out-of-order of transition state changes to a selected number per cycle.

18. The method of claim 15 , wherein e

Assignees

• Psemi Corp

Inventors

• Wu Gary Chunshien
• Giuliano David M
• Szczeszynski Gregory

Classifications

• H02M1/0095

  Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title

• G05F1/577

  for plural loads · CPC title

• H02M3/158 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• H02M3/1582 Primary

  Buck-boost converters (H02M3/1584 takes precedence) · CPC title