Substrate integrated waveguide and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-10749237-B2
Application number	US-201816050991-A
Country	US
Kind code	B2
Filing date	Jul 31, 2018
Priority date	Jul 31, 2018
Publication date	Aug 18, 2020
Grant date	Aug 18, 2020

Abstract

A method for manufacturing a substrate integrated waveguide for a millimeter wave signal is disclosed. In the method, a gold layer is disposed on a top surface of the silicon substrate using a lift-off process. Next, two parallel rows of substantially equal spaced vias are formed in the silicon substrate using a through-silicon-via etching process. Then, a copper layer is disposed on the bottom side of the silicon substrate and on interior surfaces of each via. The separation between the copper layer and the gold layer define a height of the substrate integrated waveguide, while the separation between the two parallel rows of substantially equal spaced vias define a width of the substrate integrated waveguide. In some implementations the length of the substrate defines a length of the substrate integrated waveguide, and the length, width, and height define a resonator that is resonant at a millimeter wave frequency.

First claim

The invention claimed is:

1. A method comprising:
disposing a gold layer on a top surface of a silicon substrate using a lift-off process;
forming substantially equal spaced vias in the silicon substrate using a through-silicon-via etching process; and
disposing a copper layer on a bottom surface of the silicon substrate and on an interior surface of each via, wherein a separation between the copper layer and the gold layer defines a height of a substrate integrated waveguide for a millimeter wave signal, and wherein the substantially equal spaced vias include vias that are arranged in a first pair of parallel rows, the first pair having a separation that defines a width of the substrate integrated waveguide for the millimeter wave signal.

2. The method according to claim 1 , wherein the millimeter wave signal has a frequency that is in a range of 27 to 29 gigahertz (GHz).

3. The method according to claim 1 , wherein the millimeter wave signal is a fifth generation (5G) wireless communication signal.

4. The method according to claim 1 , further comprising:
doping the silicon substrate to increase a resistivity of the silicon substrate.

5. The method according to claim 4 , wherein a dielectric constant of the doped silicon substrate is greater than 10 at a frequency of the millimeter wave signal.

6. The method according to claim 1 , wherein the substantially equal spaced vias further include vias that are arranged in a second pair of parallel rows, the second pair of parallel rows orthogonal to the first pair and having a separation that defines a length of a resonator for the millimeter wave signal.

7. The method according to claim 6 , wherein the resonator has a quality (Q) factor that is greater than 100 at a frequency of the millimeter wave signal.

8. The method according to claim 6 , wherein the length of the separation between the second pair of parallel rows of substantially equal spaced vias is less than 3 millimeters, the width of the substrate integrated waveguide is less than 3 millimeters, and the height of the substrate integrated waveguide is less than 250 micrometers.

9. The method according to claim 6 , wherein a spacing between adjacent vias in each of the two parallel rows of substantially equal spaced vias is less than 500 micrometers.

10. The method according to claim 6 , further comprising wire bonding the gold layer on the top surface of the silicon substrate to a gallium nitride (GaN) die for packaging.

11. The method according to claim 1 , wherein the lift-off process includes:
disposing a layer photoresist on the top surface of the silicon substrate, the layer of photoresist defining one or more exposed areas of the top surface that are not covered by photoresist;
disposing a layer of gold on the layer of photoresist and on the one or more exposed areas of the top surface; and
removing the gold covered photoresists to obtain the silicon substrate having a layer of gold on the one or more exposed areas.

12. The method according to claim 11 , wherein the lift-off process further comprises:
disposing a layer of titanium onto the top surface of the silicon substrate before disposing the layer of gold onto the top surface; and
removing the titanium and gold covered photoresists to obtain the silicon substrate having a layer of titanium and a layer of gold on the one or more exposed areas.

13. The method according to claim 1 , wherein the through-silicon-via process comprises:
back grinding the bottom surface of the silicon substrate to make the silicon substrate thinner; and
etching the substantially equal spaced vias in the silicon substrate.

14. A method for forming a substrate integrated waveguide (SIW), comprising:
forming substantially equal spaced vias etched in a silicon substrate using a through-silicon-via etching process;
forming a gold layer disposed on a top surface of the silicon substrate; and
forming a copper layer disposed on a bottom surface of the silicon substrate and on interior surfaces of each via, wherein a separation between the copper layer and the gold layer defines a height of the substrate integrated waveguide, and wherein the substantially equal spaced vias include vias that are arranged in a first pair of parallel rows and a second pair of parallel rows, the first pair of parallel rows being orthogonal to the second pair of parallel rows and having a separation that defines a width of the substrate integrated waveguide, the second pair of parallel rows having a separation that defines a length of a resonator.

15. The method according to claim 14 , wherein the width is less than 3 millimeters and the height is less than 250 micrometers.

16. The method according to claim 14 , wherein the silicon substrate is doped to increase a resistivity to a value that is greater than 1000 ohm-centimeter, and wherein the silicon substrate has a dielectric constant that is greater than 10 at a frequency of a millimeter wave signal.

17. The method according to claim 16 , wherein the height, the width, and the dielectric constant of the SIW facilitate guiding a millimeter wave signal having a frequency in a range of 27 to 29 gigahertz (GHz).

Assignees

• Semiconductor Components Ind

Inventors

• Shin Kiryung

Classifications

• H10W44/20

  at high-frequency [HF] or radio frequency [RF] · CPC title

• H05K3/002

  by liquid chemical etching · CPC title

• H01P7/065

  integrated in a substrate · CPC title

• H01P11/002 Primary

  Manufacturing hollow waveguides · CPC title

• H01P3/121 Primary

  integrated in a substrate · CPC title