Semiconductor memory component integrating a nano-battery, semiconductor device including such a component and method using such a device

Patent metadata

Field	Value
Publication number	US-10748917-B2
Application number	US-201815970208-A
Country	US
Kind code	B2
Filing date	May 3, 2018
Priority date	May 4, 2017
Publication date	Aug 18, 2020
Grant date	Aug 18, 2020

Abstract

A semiconductor component includes a first electrode, designated flat electrode, defining a plane; a second electrode, designated active electrode, separated from the first electrode by an electrolyte layer; a pillar, designated vertical pillar, extending essentially along an axis perpendicular to the plane defined by the flat electrode, the pillar including a third electrode, designated vertical electrode and an information storage layer, the information storage layer covering a surface of the vertical electrode; the flat electrode and the vertical pillar being laid out so as to form a memory point. In addition, the materials of the active electrode and the electrolyte layer are chosen so as to form an energy storage zone with the flat electrode.

First claim

The invention claimed is:

1. A semiconductor component comprising:
a flat electrode defining a plane;
an active electrode made of an ion source material, the active electrode being separated from the flat electrode by an electrolyte layer;
a vertical pillar extending essentially along an axis perpendicular to the plane defined by the flat electrode, said vertical pillar including a vertical electrode and an information storage layer, the information storage layer covering a surface of the vertical electrode; the flat electrode and the vertical pillar being laid out so as to form a memory point;

wherein the flat electrode:
is made of an inert material; or
comprises a first layer made of an ion source material and a second layer made of an inert material, the first layer facing the active electrode;

wherein materials of the active electrode and the electrolyte layer are chosen so as to form an energy storage zone with the flat electrode.

2. The component according to claim 1 , wherein the vertical pillar further includes a selection layer, said selection layer being situated between the vertical electrode and the information storage layer or on the information storage layer.

3. The component according to claim 1 , further comprising a plurality of flat electrodes, a plurality of electrolyte layers and a plurality of active electrodes, each flat electrode of the plurality of flat electrodes being laid out so as to form a memory point with the vertical pillar; and each active electrode of the plurality of active electrodes being separated from a flat electrode of the plurality of flat electrodes by an electrolyte layer of the plurality of electrolyte layers so as to form an energy storage zone.

4. The component according to claim 3 , wherein each flat electrode comprises a first layer made of an ion source material and a second layer made of an inert material and a third layer made of an ion source material, said third layer facing an active electrode of the plurality of active electrodes, separated from said active electrode by an electrolyte layer of the plurality of electrolyte layers, said third layer, said electrolyte layer and said active electrode forming an energy storage zone.

5. The component according to claim 4 , wherein the first layer and/or the third layer of each flat electrode of the plurality of flat electrodes are not in contact with the vertical pillar.

6. The component according to claim 4 , wherein the first layer and/or the third layer of each flat electrode of the plurality of flat electrodes are separated from the vertical pillar by an insulating material.

7. The component according to claim 3 , wherein the material of the vertical electrode and the material of the information storage layer are chosen so as to form, with the flat electrode or with each flat electrode of the plurality of flat electrodes, a phase change memory point or a resistive memory point.

8. The component according to claim 3 , further comprising a plurality of vertical pillars each vertical pillar being laid out so as to form a memory point with the flat electrode or with each flat electrode of the plurality of flat electrodes.

9. The component according to claim 8 , wherein a projection of the vertical pillars of the plurality of vertical pillars onto a plane parallel to the plane formed by the flat electrode or to the planes formed by the flat electrodes of the plurality of flat electrodes forms an array of which the unit cell is a square cell or a lozenge-shaped cell.

10. A semiconductor device comprising a component according to claim 1 and a system so that said component is used for the storage of information and/or for the storage of energy.

11. The semiconductor device according to claim 10 , further comprising a second one of said component and a system so that the second component is used for the storage of information and/or for the storage of energy.

12. A method for using a device according to claim 11 , comprising:
a step in which at least one among the first or the second semiconductor component is used for the storage of information;
a step in which at least one among the first or the second semiconductor component is used for the storage of energy.

13. The method according to claim 12 , wherein the energy required for the step of using at least one component for the storage of information is supplied by the energy stored during the step in which at least one component is used for the storage of energy.

14. A semiconductor component comprising:
a flat electrode defining a plane;
an active electrode separated from the flat electrode by an electrolyte layer;
a vertical pillar extending essentially along an axis perpendicular to the plane defined by the flat electrode, said vertical pillar including a vertical electrode and an information storage layer, the information storage layer covering a surface of the vertical electrode; the flat electrode and the vertical pillar being laid out so as to form a memory point;
wherein materials of the active electrode and the electrolyte layer are chosen so as to form an energy storage zone with the flat electrode, said energy storage zone being charged or discharged by applying a voltage between the active electrode and the flat electrode, said voltage causing migration of ions from the active electrode in the electrolyte layer and the formation of an electromotive force in the energy storage zone.

15. A semiconductor device comprising:
a first semiconductor component including
a flat electrode defining a plane;
an active electrode separated from the flat electrode by an electrolyte layer;
a vertical pillar extending essentially along an axis perpendicular to the plane defined by the flat electrode, said vertical pillar including a vertical electrode and an information storage layer, the information storage layer covering a surface of the vertical electrode; the flat electrode and the vertical pillar being laid out so as to form a memory point;
wherein materials of the active electrode and the electrolyte layer are chosen so as to form an energy storage zone with the flat electrode,

a second component, and
an output circuit configured to pull energy generated by the energy storage zone to supply said energy to a second component.

Assignees

• Commissariat Energie Atomique

Inventors

• Lee Daeseok
• Molas Gabriel
• Oukassi Sami

Classifications

• H10D30/693

  Vertical IGFETs having charge trapping gate insulators · CPC title

• H10D30/691

  having more than two programming levels · CPC title

• H10B63/10

  Phase change RAM [PCRAM, PRAM] devices · CPC title

• H10B63/845 Primary

  the switching components being connected to a common vertical conductor · CPC title

• H10N70/8828

  Tellurides, e.g. GeSbTe · CPC title