Silicon carbide semiconductor device and method for manufacturing same
US-2016104794-A1 · Apr 14, 2016 · US
US10748780B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10748780-B2 |
| Application number | US-201916353670-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 14, 2019 |
| Priority date | Oct 5, 2016 |
| Publication date | Aug 18, 2020 |
| Grant date | Aug 18, 2020 |
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In a manufacturing method of a silicon carbide semiconductor device, a semiconductor substrate made of silicon carbide and on which a base layer is formed is prepared, a trench is provided in the base layer, a silicon carbide layer is epitaxially formed on a surface of the base layer while filling the trench with the silicon carbide layer, the sacrificial layer is planarized by reflow after forming the sacrificial layer, and the silicon carbide layer is etched back together with the planarized sacrificial layer by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1.
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What is claimed is: 1. A manufacturing method of a silicon carbide semiconductor device, comprising: preparing a semiconductor substrate made of silicon carbide and on which a base layer is formed; providing a trench in the base layer; epitaxially growing a silicon carbide layer on a surface of the base layer while filling the trench with the silicon carbide layer; forming a sacrificial layer on a surface of the silicon carbide layer; planarizing the sacrificial layer by reflow after forming the sacrificial layer; and etching back the silicon carbide layer together with the sacrificial layer that is planarized by dry etching under an etching condition in which an etching selectivity of the silicon carbide layer to the sacrificial layer is 1, wherein the providing of the trench includes providing an alignment trench at a position different from the trench in the base layer, the epitaxially growing the silicon carbide layer includes forming the silicon carbide layer to fill the alignment trench with the silicon carbide layer, the forming the sacrificial layer includes forming the sacrificial layer also on the silicon carbide layer formed to fill the alignment trench, and the etching back is performed until a facet included in a recess provided at a position corresponding to the alignment trench in the surface of the silicon carbide layer is removed. 2. The manufacturing method according to claim 1 , wherein the etching back includes exposing a surface of the base layer and leaving the silicon carbide layer only in the trench. 3. The manufacturing method according to claim 1 , wherein the forming the sacrificial layer includes forming one of PSG, BPSG, or SOG as the sacrificial layer. 4. The manufacturing method according to claim 1 , wherein the preparing the semiconductor substrate on which the base layer is formed includes preparing a silicon carbide substrate of a first conductivity type or a second conductivity type as the semiconductor substrate, and forming, as the base layer, a drift layer of the first conductivity type made of silicon carbide having an impurity concentration lower than an impurity concentration of the silicon carbide substrate, a base region of the second conductivity type made of silicon carbide, and a source region of the first conductivity type made of silicon carbide having an impurity concentration higher than the impurity concentration of the drift layer on the silicon carbide substrate in a stated order, the etching back includes forming a deep layer of the second conductivity type in the trench by performing the etching back until a surface of the source region is exposed, and the manufacturing method further comprising: after forming the deep layer, forming a trench gate structure in which a gate trench deeper than the base region is provided from the surface of the source region, a gate insulating film is formed on an inner wall surface of the gate trench, and a gate electrode is formed on the gate insulating film; forming a source electrode electrically connected to the source region and the deep layer; and forming a drain electrode on a rear surface of the semiconductor substrate. 5. The manufacturing method according to claim 1 , wherein the preparing the semiconductor substrate on which the base layer is formed includes preparing a silicon carbide substrate of a first conductivity type as the semiconductor substrate, and forming, as the base layer, a drift layer of a first conductivity type made of silicon carbide having an impurity concentration lower than an impurity concentration of the silicon carbide on the silicon carbide substrate, the etching back includes forming a deep layer of a second conductivity type in the trench by performing the etching back until a surface of the drift layer is exposed, and the manufacturing method further comprising: forming a Schottky electrode electrically connected to the drift layer and the deep layer; and forming an ohmic electrode on a rear surface of the semiconductor substrate.
by chemical means · CPC title
by exposure to a gas or vapour · CPC title
for alignment · CPC title
Marks applied to devices, e.g. for alignment or identification · CPC title
of Group IV materials · CPC title
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