Semiconductor integrated optical device

US10741591B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10741591-B2
Application numberUS-201916283191-A
CountryUS
Kind codeB2
Filing dateFeb 22, 2019
Priority dateFeb 27, 2018
Publication dateAug 11, 2020
Grant dateAug 11, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor integrated optical device comprising: a supporting base including semi-insulating semiconductor; a conductive semiconductor region disposed on a principal face of the supporting base; a first photoelectric convertor having first photodiode mesas on the conductive semiconductor region; a second photoelectric convertor having second photodiode mesas on the conductive semiconductor region; a first 90° optical hybrid optically coupled to the first photoelectric convertor, the first 90° optical hybrid having at least one first multimode waveguide mesa on the conductive semiconductor region; a second 90° optical hybrid optically coupled to the second photoelectric convertor, the second 90° optical hybrid having at least one second multimode waveguide mesa on the conductive semiconductor region; an optical divider mesa disposed on the supporting base; a first input waveguide mesa disposed on the conductive semiconductor region, the first input waveguide mesa coupling the optical divider mesa with the first 90° optical hybrid; a second input waveguide mesa disposed on the conductive semiconductor region, the second input waveguide mesa coupling the optical divider mesa with the second 90° optical hybrid; a first island semiconductor mesa extending between the first multimode waveguide mesa and the second multimode waveguide mesa, the first island semiconductor mesa being disposed on the conductive semiconductor region; and a first groove extending in a direction of a first axis to penetrate through the first island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor of the supporting base, the first axis intersecting the principal face. 2. The semiconductor integrated optical device according to claim 1 , wherein the supporting base has a first region, a second region, a third region, and a fourth region, the first region, the second region, the third region, and the fourth region are arranged along a second axis intersecting the first axis, the first photodiode mesas of the first photoelectric convertor are disposed on the first region, the second photodiode mesas of the second photoelectric convertor are disposed on the first region, the first multimode waveguide mesa of the first 90° optical hybrid is disposed on the second region, the second multimode waveguide mesa of the second 90° optical hybrid is disposed on the second region, the optical divider mesa is disposed on the fourth region, the first input waveguide mesa is disposed on the third region, the second input waveguide mesa is disposed on the third region, and the first island semiconductor mesa is disposed on the second region and the third region. 3. The semiconductor integrated optical device according to claim 1 , further comprising: a first waveguide mesa connecting the first multimode waveguide mesa with one of the first photodiode mesas; a second waveguide mesa connecting the second multimode waveguide mesa with one of the second photodiode mesas; a third photoelectric convertor having third photodiode mesas on the supporting base; a third waveguide mesa connecting the first multimode waveguide mesa with one of the third photodiode mesas; a second island semiconductor mesa extending between the first waveguide mesa and the third waveguide mesa, the second island semiconductor mesa being disposed on the conductive semiconductor region and the supporting base; and a second groove extending in the direction of the first axis to penetrate through the second island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor of the supporting base. 4. The semiconductor integrated optical device according to claim 2 , further comprising: a first waveguide mesa connecting the first multimode waveguide mesa with one of the first photodiode mesas; a second waveguide mesa connecting the second multimode waveguide mesa with one of the second photodiode mesas; a third photoelectric convertor having third photodiode mesas on the first region; a third waveguide mesa connecting the first multimode waveguide mesa with one of the third photodiode mesas; a second island semiconductor mesa extending between the first waveguide mesa and the third waveguide mesa, the second island semiconductor mesa being disposed on the second region and the conductive semiconductor region; and a second groove extending in the direction of the first axis to penetrate through the second island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor of the supporting base. 5. The semiconductor integrated optical device according to claim 1 , further comprising an insulating layer having openings on the first multimode waveguide mesa and the second multimode waveguide mesa, the insulating layer covering the first photodiode mesas, the second photodiode mesas, and the first island semiconductor mesa, and the insulating layer being disposed in the first groove. 6. The semiconductor integrated optical device according to claim 1 , further comprising a high specific-resistance layer covering the first island semiconductor mesa and the conductive semiconductor region, and the high specific-resistance layer having a specific resistance higher than that of the conductive semiconductor region. 7. The semiconductor integrated optical device according to claim 2 , further comprising a high specific-resistance layer covering the first island semiconductor mesa and the conductive semiconductor region on the first region, and the high specific-resistance layer having a specific resistance higher than that of the conductive semiconductor region.

Assignees

Inventors

Classifications

  • having three or more elements, e.g. GaAlAs, InGaAs or InGaAsP · CPC title

  • directly associated or integrated with the devices, e.g. back reflectors (directly associated or integrated with photovoltaic cells H10F77/42) · CPC title

  • Shapes of bodies · CPC title

  • comprising at least three elements, e.g. GaAlAs or InGaAsP · CPC title

  • the potential barrier being a PIN barrier · CPC title

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What does patent US10741591B2 cover?
A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa…
Who is the assignee on this patent?
Sumitomo Electric Industries, Sedi Inc
What technology area does this patent fall under?
Primary CPC classification H10F39/103. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 9 related publications on this page (citations in our corpus or others sharing the same primary CPC).