Merge mandrel features

Patent metadata

Field	Value
Publication number	US-10741439-B2
Application number	US-201916411775-A
Country	US
Kind code	B2
Filing date	May 14, 2019
Priority date	Jan 16, 2018
Publication date	Aug 11, 2020
Grant date	Aug 11, 2020

Abstract

The present disclosure relates to semiconductor structures and, more particularly, to merged mandrel lines and methods of manufacture. The structure includes: at least one metal line having a first dimension in a self-aligned double patterning (SADP) line array; and at least one metal line having a second dimension inserted into the SADP line array, the second dimension being different than the first dimension.

First claim

What is claimed:

1. A method, comprising:
forming a first mandrel pattern comprising at least two mandrel patterns of a first dimension in a self-aligned double patterning (SADP) line array; and
forming a second mandrel pattern having a second dimension inserted into the SADP line array, where the second dimension is different than the first dimension,
wherein the first mandrel pattern and the second mandrel pattern comprise a same material, are provided in a same layer of a structure, and at least two mandrel patterns are merged together with the second mandrel pattern to form a single pattern.

2. The method of claim 1 , wherein the second dimension is formed by an etching process which merges the at least two mandrel patterns of the first dimension.

3. The method of claim 2 , wherein the merging of the mandrel pattern of the first dimension comprises patterning a lithography stack over a hardmask material that has already been patterned and etching the mandrel material using the patterned hardmask material and the lithography stack before spacer deposition.

4. The method of claim 3 , wherein the patterning of the lithography stack forms a block that corresponds in width to two mandrel patterns of the first dimension and a space therebetween.

5. The method of claim 4 , further comprising forming wiring structures in an underlying dielectric material by transferring a pattern of the first mandrel pattern and the second mandrel pattern into the underlying dielectric material and depositing conductive material in the pattern of the dielectric material.

6. The method of claim 5 , wherein the conductive material is copper, cobalt, tungsten, ruthenium, or poly-silicon.

7. The method of claim 5 , wherein the transfer of the second mandrel features is a merged mandrel patterns.

8. The method of claim 5 , further comprising forming additional wiring structures in the underlying dielectric material, outside of the SADP line array.

9. The method of claim 5 , wherein the wiring structure with the pattern of the second mandrel pattern has a width equal to adjacent wiring structures with the pattern of the first mandrel pattern and a space therebetween.

10. The method of claim 4 , wherein the wiring structures comprising at least one metal line having the first dimension and at least one metal line having the second dimension, and the at least one metal line with the second dimension comprises a first metal line and a second metal line, and further comprising:
merging together the first metal line and the second metal line with a metal bridge connecting the first metal line to the second metal line.

11. The method of claim 10 , wherein the SADP array includes additional metal lines that are of the first dimension on opposing side of the first metal line and the second metal line merged together by the metal bridge.

12. The method of claim 4 , wherein the at least one metal line with the second dimension is a power rail which conducts electrical current and the first metal line and the second metal line are parallel to one another within the SADP array.

13. The method of claim 1 , wherein, in the SADP array, there are at least three metal lines with the first dimension and further metal lines alternating with the at least three metal lines with the first dimension.

14. The method of claim 1 , wherein the at least one metal line with the first dimension includes at least two metal wiring lines comprising a first metal wiring line within the SADP array and a second metal wiring line outside of the SADP array, both of which have a width of the first dimension.

15. The method of claim 1 , further comprising transferring the first mandrel pattern and the second mandrel pattern into an underlying dielectric material using a sidewall image technique.

16. The method of claim 15 , wherein the transferring forms trenches in the underlying dielectric material that correspond to the first mandrel pattern and the second mandrel pattern.

17. The method of claim 16 , further comprising filling the trenches in the underlying dielectric material with conductive material to form a first wiring structure merged together with a second wiring structure.

18. The method of claim 17 , further comprising forming additional trenches in the underlying dielectric material outside of the first mandrel pattern and the second mandrel pattern and filling the additional trenches with the conductive material, the additional trenches being separated and apart from the trenches.

19. The method of claim 1 , wherein the first mandrel pattern and the second mandrel pattern are formed of amorphous silicon on a hardmask material over the underlying dielectric material.

20. The method of claim 19 , wherein the first mandrel pattern initially comprises a first material and a second material, the second mandrel pattern comprises the first material and further comprising removing the second material from the first mandrel pattern.

Assignees

• Globalfoundries Inc

Inventors

• Chen Hsueh-Chung
• O'Toole Martin J
• Spooner Terry A
• Stephens Jason E

Classifications

• H10P50/73

  using masks for insulating materials · CPC title

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P76/4083

  characterised by their behaviours during the lithography processes, e.g. soluble masks or redeposited masks · CPC title

• H10W20/4451

  Semiconductor materials, e.g. polysilicon · CPC title

• H10W20/4441

  the principal metal being a refractory metal · CPC title