Linear and non-linear calibration for time interleaved digital-to-analog converter

Patent metadata

Field	Value
Publication number	US-10735013-B2
Application number	US-201916526875-A
Country	US
Kind code	B2
Filing date	Jul 30, 2019
Priority date	Dec 31, 2018
Publication date	Aug 4, 2020
Grant date	Aug 4, 2020

Abstract

A time-interleaved digital-to-analog converter system, comprising a digital pre-distorter configured to receive an input digital signal and an error signal and output a distorted digital signal based on the input digital signal and the error signal; a time-interleaved digital-to-analog converter having a first sample rate, the time-interleaved digital-to-analog converter configured to convert the distorted digital signal to an analog signal; and a calibration system. The calibration system includes an analog-to-digital converter having a second sample rate equal to or lower than the first sample rate, the analog-to-digital converter configured to receive the analog signal and covert the analog signal to a down-sampled digital signal, a discrete-time linear model configured to receive the input digital signal and the error signal and output a model signal, and a combiner to subtract the down-sampled digital signal from the model signal to generate the error signal.

First claim

We claim:

1. A time-interleaved digital-to-analog converter system, comprising:
a digital pre-distorter configured to receive an input digital signal and an error signal and output a distorted digital signal based on the input digital signal and the error signal;
a time-interleaved digital-to-analog converter having a first sample rate, the time-interleaved digital-to-analog converter configured to convert the distorted digital signal to an analog signal, the distorted signal correcting mismatch between time-interleaved channels of the time-interleaved digital-to-analog converter; and
a calibration system comprising:
an analog-to-digital converter having a second sample rate equal to or lower than the first sample rate, the analog-to-digital converter configured to receive the analog signal and covert the analog signal to a down-sampled digital signal,
a discrete-time linear model configured to receive the input digital signal and output a model signal, and
a combiner to subtract the down-sampled digital signal from the model signal to generate the error signal.

2. The time-interleaved digital-to-analog converter system of claim 1 , wherein the discrete-time linear model also receives the error signal and includes a finite impulse response filter having at least one adaptive tap and a constant tap.

3. The time-interleaved digital-to-analog converter system of claim 1 , wherein the calibration system is enabled during a pre-operation calibration with a known digital input signal.

4. The time-interleaved digital-to-analog converter system of claim 3 , further comprising a digital signal processor configured to determine whether to disable the calibration system during operation with an unknown digital input signal based on the digital input signal.

5. The time-interleaved digital-to-analog converter system of claim 1 , wherein the digital pre-distorter includes a plurality of delay lines with different order products, each delay line receiving the digital input signal.

6. The time-interleaved digital-to-analog converter system of claim 5 , wherein the digital pre-distorter further includes:
a plurality of first demultiplexers, each first demultiplexer for each output of the delay lines with different order products, each first demultiplexer receiving the output of each of the delay lines and outputting a parallel stream of data having a number of signals equal to a number of channels of the time-interleaved digital-to-analog converter;
a plurality of second demultiplexers, each second demultiplexer to receive the error signal and output a parallel stream of error data having a number of signals equal to a number of channels of the time-interleaved digital-to-analog converter;
a plurality of coefficient adapters, each coefficient adapter to correlate the respective parallel stream of data and the parallel stream of error data and output a number of variable coefficients equal to the number of channels of the time-interleaved digital-to-analog converter;
a plurality of first combiners, each first combiner to combine the respective variable coefficients with the parallel stream of data into a parallel stream of combined data;
a plurality of multiplexers, each multiplexer configured to combine the respective parallel stream of combined data into a signal; and
a second combiner configured to combine each of the signals from the plurality of multiplexers into the distorted digital signal.

7. The time-interleaved digital-to-analog converter system of claim 6 , wherein the first combiner is a point-wise multiplier to multiply the variable coefficients with the parallel stream of data.

8. The time-interleaved digital-to-analog converter system of claim 6 , wherein the first combiner is a multiple input, multiple output unit having a number of finite impulse response filters.

9. The time-interleaved digital-to-analog converter system of claim 8 , wherein the coefficient adapter is a multiple input, multiple output coefficient adapter.

10. The time-interleaved digital-to-analog converter system of claim 1 , wherein the calibration system operates in real-time.

11. A test and measurement instrument, comprising:
the time-interleaved digital-to-analog converter system of claim 1 ; and
a port configured to receive the analog signal and output the analog signal to an electrically or fiber optically coupled device under test.

12. A method for calibrating a time-interleaved digital-to-analog converter, comprising:
generating a distorted digital signal by distorting an input digital signal based on an error signal;
converting the distorted digital signal to an analog signal through a time-interleaved digital-to-analog converter;
converting the analog signal to a down-sampled digital signal;
generating a model signal based on the input digital signal; and
generating the error signal by subtracting the down-sampled digital signal from the model signal.

13. The method of claim 12 , wherein generating the model signal includes processing the digital input signal and the error signal through a finite impulse response filter having at least one adaptive tap and a constant tap.

14. The method of claim 12 , further comprising enabling the method during a pre-operation calibration with a known digital input signal.

15. The method of claim 12 , further comprising enabling the method during operation with an unknown digital input signal based on the digital input signal.

16. The method of claim 12 , further comprising delaying the digital input signal through a plurality of delay lines with different order products.

17. The method of claim 16 , further comprising:
receiving an output of each of the delay lines at a respective first demultiplexer and outputting from each respective first demultiplexer a parallel stream of data having a number of signals equal to a number of channels of the time-interleaved digital-to-analog converter;
receiving the error signal and outputting at each of a plurality of second demultiplexers a parallel stream of error data having a number of signals equal to a number of channels of the time-interleaved digital-to-analog converter;
correlating the respective parallel stream of data and the respective parallel stream of error data and outputting at each coefficient adapter of a plurality of coefficient adapters a number of variable coefficients equal to the number of channels of the time-interleaved digital-to-analog converter;
combining each of the variable coefficients with the respective parallel stream of data into a parallel stream of respective combined data;
multiplexing at each multiplexer of a plurality of multiplexers the respective combined data into a respective signal; and
combining each of the respective signals into the distorted digital signal.

18. The method of claim 12 , further comprising:
mixing the analog signal with a signal from a local oscillator to generate a mixed signal;
filtering the mixed signal through a low-pass filter prior to converting the analog signal to a down-sampled digital signal.

19. The method of claim 12 , further comprising:
mixing the model signal with a signal from a local oscillator to generate a mixed signal;
filtering the mixed signal through a low-pass filter;
down-sampling the filtered mixed signal prior to generating the error signal.

20. The method of claim 19 , further comprising:
filtering the model signal through a tunable bandpass filter prior to mixing the model signal with the signal from the first local oscillator.

Assignees

• Tektronix Inc

Inventors

• Hovakimyan Karen
• Martin Gregory A
• Knierim Daniel G

Classifications

• H03M1/1033 Primary

  over the full range of the converter, e.g. for correcting differential non-linearity · CPC title

• H03F1/3247

  using feedback acting on predistortion circuits (H03F1/3264 takes precedence) · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F3/24

  of transmitter output stages · CPC title

• H03M1/662

  Multiplexed conversion systems · CPC title