Broadband back mirror for a III-V chip in silicon photonics

US10732349B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10732349-B2
Application numberUS-201715426375-A
CountryUS
Kind codeB2
Filing dateFeb 7, 2017
Priority dateFeb 8, 2016
Publication dateAug 4, 2020
Grant dateAug 4, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor laser has a mirror formed in a gain chip. The mirror can be placed in the gain chip to provide a broadband reflector to support multiple lasers using the gain chip. The mirror can also be placed in the gain chip to have the semiconductor laser be more efficient or more powerful by changing an optical path length of the gain of the semiconductor laser.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor laser comprising: a platform, wherein: the platform is made of a first semiconductor material; and the platform comprises a waveguide; a gain medium, wherein: the gain medium is made of a second semiconductor material; the second semiconductor material has a direct bandgap; the gain medium comprises a first edge; the gain medium comprises a second edge; and the first edge is opposite the second edge; a first wall and a second wall forming a trench in the gain medium, wherein the first wall and the second wall are between the first edge and the second edge; a coating disposed on the first wall, wherein: the coating comprises a dielectric layer and a metal; the dielectric layer is between the first wall and the metal; and the coating forms a mirror in the gain medium; and a ridge formed in the gain medium, wherein: the ridge is configured to guide light in the gain medium; the ridge comprises a first end and a second end; the first end is opposite the second end; the first end terminates at the mirror; and the second end is optically coupled with the waveguide. 2. The semiconductor laser as recited in claim 1 , wherein: the first semiconductor material is silicon; and the second semiconductor material comprises a III-V material. 3. The semiconductor laser as recited in claim 1 , further comprising a reflector in the platform, wherein the mirror and the reflector form a resonator cavity. 4. The semiconductor laser as recited in claim 3 , wherein the reflector in the platform is configured to be an output coupler for the semiconductor laser. 5. The semiconductor laser as recited in claim 4 , wherein the dielectric layer is transparent to light corresponding to an energy of a bandgap of the second semiconductor material. 6. The semiconductor laser as recited in claim 4 , wherein the dielectric layer has a thickness between 25 nm and 100 nm. 7. The semiconductor laser as recited in claim 1 , wherein: a metal coating is disposed on the second wall; and the metal coating disposed on the second wall forms a mirror on the second wall. 8. The semiconductor laser as recited in claim 7 , wherein: the semiconductor laser is a first laser; and the mirror on the second wall is configured to reflect light from a second laser. 9. The semiconductor laser as recited in claim 1 , wherein the first edge and the second edge of the gain medium are formed by cleaving a semiconductor wafer. 10. The semiconductor laser as recited in claim 1 , wherein the first wall is skew in relation to the first edge. 11. The semiconductor laser as recited in claim 1 , wherein the gain medium is the gain for two or more lasers. 12. The semiconductor laser as recited in claim 11 , wherein the gain medium is the gain for six or more lasers. 13. A method for fabricating a semiconductor laser with a mirror in a gain medium, the method comprising: bonding a chip to a platform, wherein: the chip comprises a first semiconductor material; the chip has a first edge; the chip has a second edge; and the platform comprises a second semiconductor material; defining a ridge on the chip, wherein: the ridge is configured to guide light in the chip; the ridge comprises a first end and a second end; the first end is opposite the second end; the platform comprises a waveguide; and the second end is optically coupled with the waveguide; etching the chip to form a first wall and a second wall in the chip, wherein: the etching the chip forms the first wall and the second wall in the chip between the first edge of the chip and the second edge of the chip; and the etching the chip to form the first wall defines the second end of the ridge; and applying a coating to the first wall to form the mirror, wherein: the coating comprises a metal; the coating comprises a dielectric layer; and the dielectric layer is between the first wall and the metal. 14. The method of claim 13 , wherein etching the chip to form the first wall and the second wall occurs after bonding the chip to the platform. 15. The method of claim 13 , further comprising applying the coating to the second wall concurrently with applying the coating to the first wall. 16. The method of claim 15 , wherein applying the coating comprises applying the metal to the dielectric layer after applying the dielectric layer to the first wall and the second wall. 17. The method of claim 16 , wherein: the first wall and the second wall define a recessed region in the chip; and applying the coating to the first wall also applies the coating to the second wall, such that the mirror comprises two reflective surfaces. 18. A semiconductor laser comprising: a chip, wherein: the chip is made of a semiconductor material; the semiconductor material has a direct bandgap; the chip comprises a first edge; the chip comprises a second edge; and the first edge is opposite the second edge; a first wall and a second wall in the chip, wherein: the first wall and the second wall are between the first edge and the second edge; the first wall is opposite the second wall; and the first wall and the second wall define a recessed portion in the chip; and a coating disposed on the first wall and on the second wall, wherein: the coating comprises a metal; the coating comprises a dielectric layer between the metal and the first wall; and the coating forms a mirror in the chip. 19. The semiconductor laser as recited in claim 18 , comprising: a platform, wherein: the platform is made of a first semiconductor material; the platform comprises a waveguide; and the chip is bonded to the platform; and a ridge formed in the chip, wherein: the ridge is configured to guide light in the chip; the ridge comprises a first end and a second end; the first end is opposite the second end; the first end terminates at the mirror; and the second end is optically coupled with the waveguide. 20. The semiconductor laser as recited in claim 18 , comprising: three or more ridges formed in the chip, wherein each ridge of the three or more ridges terminates at the mirror; and three or more waveguides, wherein the three or more waveguides are each optically coupled with one ridge of the three or more ridges.

Assignees

Inventors

Classifications

  • Wavelength-division multiplex systems · CPC title

  • Arrangements for relative positioning of laser diodes and optical components, e.g. grooves in the mount to fix optical fibres or lenses · CPC title

  • H01S5/141Primary

    using a wavelength selective device, e.g. a grating or etalon (H01S5/146 takes precedence) · CPC title

  • Coatings {; Treatment of the laser facets, e.g. etching, passivation layers or reflecting layers} · CPC title

  • Three-dimensional structures · CPC title

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Frequently asked questions

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What does patent US10732349B2 cover?
A semiconductor laser has a mirror formed in a gain chip. The mirror can be placed in the gain chip to provide a broadband reflector to support multiple lasers using the gain chip. The mirror can also be placed in the gain chip to have the semiconductor laser be more efficient or more powerful by changing an optical path length of the gain of the semiconductor laser.
Who is the assignee on this patent?
Skorpios Tech Inc
What technology area does this patent fall under?
Primary CPC classification H01S5/141. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 04 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).