Reconfigurable sensor unit for electronic device

Patent metadata

Field	Value
Publication number	US-10731984-B2
Application number	US-201916686091-A
Country	US
Kind code	B2
Filing date	Nov 15, 2019
Priority date	Feb 26, 2015
Publication date	Aug 4, 2020
Grant date	Aug 4, 2020

Abstract

A sensor chip includes registers storing and outputting configuration data, an extraction circuit receiving digital data and extracting features of the digital data in accordance with the configuration data, and a classification circuit applying a decision tree to the extracted features to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the decision tree operating according to the configuration data. The classification unit outputs the context to the registers for storage. The configuration data includes which features for the extraction circuit to extract from the digital data, and a structure for the decision tree. The structure for the decision tree includes conditions that the decision tree is to apply to the at least one extracted feature, and outcomes to be effectuated based upon whether the extracted features meet or do not meet the conditions.

First claim

The invention claimed is:

1. A sensor chip comprising:
configuration registers configured to store and output configuration data;
an extraction circuit configured to receive digital data and extract at least one feature of the digital data in accordance with the configuration data;
a classification circuit configured to apply a decision tree to the at least one extracted feature of the digital data so as to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the decision tree operating in accordance with the configuration data; and
data registers, wherein the classification circuit is configured to output the context to the data registers for storage;
wherein the configuration data identifies which at least one feature for the extraction circuit to extract from the digital data, and a structure for the decision tree; and
wherein the structure for the decision tree includes at least one condition that the decision tree is to apply to the at least one extracted feature, a first outcome to be effectuated if the at least one extracted feature meets the at least one condition, and a second outcome to be effectuated if the at least one extracted feature does not meet the at least one condition.

2. The sensor chip comprising:
configuration registers configured to store and output configuration data;
an extraction circuit configured to receive digital data and extract at least one feature of the digital data in accordance with the configuration data;
a classification circuit configured to apply a decision tree to the at least one extracted feature of the digital data so as to generate a context of an electronic device into which the sensor chip is incorporated relative to its surroundings, the decision tree operating in accordance with the configuration data; and
data registers, wherein the classification circuit is configured to output the context to the data registers for storage;
wherein the configuration data identifies which at least one feature for the extraction circuit to extract from the digital data, and a structure for the decision tree;
wherein the structure for the decision tree includes at least one condition that the decision tree is to apply to the at least one extracted feature, a first outcome to be effectuated if the at least one extracted feature meets the at least one condition, and a second outcome to be effectuated if the at least one extracted feature does not meet the at least one condition;
wherein the structure for the decision tree is comprised of a plurality of nodes, with at least one node of the plurality of nodes being a non-leaf node, and with at least two nodes of the plurality of nodes being leaf nodes;
wherein each non-leaf node includes a respective condition that the decision tree is to apply to the at least one extracted feature, a first outcome to be effectuated if the at least one extracted feature meets that condition, and a second outcome to be effectuated if the at least one extracted feature does not meet that condition; and
wherein at least one of the first and second outcomes is for the decision tree applied by the classification circuit to proceed to one of the leaf nodes.

3. The sensor chip of claim 2 ,
wherein each leaf node contains a potential context of the electronic device into which the sensor chip is incorporated relative to its surroundings; and
when the decision tree proceeds to one of the leaf nodes, the potential context contained in that leaf node is output by the classification circuit as the context of the electronic device into which the sensor chip is incorporated relative to its surroundings.

4. The sensor chip of claim 2 , wherein at least one leaf node contains a link to a finite state machine; and when the decision tree proceeds to the leaf node containing the link to the finite state machine, the finite state machine determines the context of the electronic device into which the sensor chip is incorporated relative to its surroundings based upon a path taken through the decision tree and the at least one extracted feature.

5. The sensor chip of claim 2 ,
wherein each leaf node contains a potential classification of the at least one extracted feature; and
when the decision tree proceeds to one of the leaf nodes, a counter for the potential classification contained in that leaf node is incremented.

6. The sensor chip of claim 5 , wherein the classification circuit is further configured to apply a meta-classifier to the counter for the potential classification to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings.

7. The sensor chip of claim 5 , wherein the classification circuit is further configured to apply a second decision tree to the counter for the potential classification to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings.

8. The sensor chip of claim 5 , wherein the classification circuit is configured to use a finite state machine to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings from the counter for the potential classification.

9. The sensor chip of claim 5 , wherein the classification circuit is further configured to apply a meta-classifier to the counter for the potential classification to produce a filtered counter for the potential classifier.

10. The sensor chip of claim 9 , wherein the classification circuit is further configured to apply a meta-classifier to the filtered counter for the potential classification to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings.

11. The sensor chip of claim 9 , wherein the classification circuit is further configured to apply a second decision tree to the filtered counter for the potential classification to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings.

12. The sensor chip of claim 9 , wherein the classification circuit is configured to use a finite state machine to determine the context of the electronic device into which the sensor chip is incorporated relative to its surroundings from the filtered counter for the potential classification.

13. The sensor chip of claim 2 , wherein at least one of the first and second outcomes is for the decision tree to proceed to a subsequent non-leaf node.

14. The sensor chip of claim 2 , wherein the sensor chip includes a data interface for communication with at least one other component of the electronic device into which the sensor chip is incorporated; and wherein the configuration data is received by the configuration registers from the at least one other component over the data interface.

15. The sensor chip of claim 2 , wherein the at least one feature of the digital data comprises a plurality of feature vectors of the digital data; wherein the extraction circuit is further configured to generate at least one feature vector by mathematically combining at least some of the plurality of feature vectors of the digital data; and wherein the classification circuit applies the decision tree to the at least one feature vector.

16. The sensor chip of claim 2 , wherein the at least one feature of the digital data comprises at least one of mean acceleration, radian acceleration, number of acceleration peaks, number of zero crosses, peak acceleration values, linear acceleration values, energy in bands, mean of roll, pitch, and yaw,

Assignees

• St Microelectronics Inc

Inventors

• Chowdhary Mahesh

Classifications

• G01C19/5776 Primary

  Signal processing not specific to any of the devices covered by groups G01C19/5607 - G01C19/5719 · CPC title

• G01C19/32 Primary

  Indicating or recording means specially adapted for rotary gyroscopes · CPC title

• G01P15/18

  in two or more dimensions · CPC title