Efficiently generating effective address translations for memory management test cases

Patent metadata

Field	Value
Publication number	US-10713179-B2
Application number	US-201916373372-A
Country	US
Kind code	B2
Filing date	Apr 2, 2019
Priority date	Aug 3, 2016
Publication date	Jul 14, 2020
Grant date	Jul 14, 2020

Abstract

Efficiently generating effective address translations for memory management test cases including obtaining a first set of EAs, wherein each EA comprises an effective segment ID and a page, wherein each effective segment ID of each EA in the first set of EAs is mapped to a same first effective segment; obtaining a set of virtual address corresponding to the first set of EAs; translating the first set of EAs by applying a hash function to each virtual address in the set of virtual addresses to obtain a first set of PTEG addresses mapped to a first set of PTEGs; and generating a translation for a second set of EAs to obtain a second set of PTEG addresses mapped to the first set of PTEGs.

First claim

What is claimed is:

1. A method for efficiently generating effective address translations for memory management test cases, the method comprising:
obtaining a first set of effective addresses (EAs), wherein each EA comprises an effective segment identifier (‘ID’) and a page, wherein each effective segment ID of each EA in the first set of EAs is mapped to a same first effective segment;
obtaining a set of virtual address corresponding to the first set of EAs, wherein each virtual segment ID of each virtual address in the first set of virtual addresses is mapped to a same virtual segment;
translating the first set of EAs by applying a hash function to each virtual address in the set of virtual addresses to obtain a first set of page table entry group (PTEG) addresses mapped to a first set of PTEGs; and
generating a translation for a second set of EAs to obtain a second set of PTEG addresses mapped to the first set of PTEGs, wherein each effective segment ID of each EA in the second set of EAs is mapped to a same second effective segment.

2. The method of claim 1 , further comprising:
generating a translation for a third set of EAs to obtain a third set of PTEG addresses mapped to a second set of PTEGs, wherein translating the third set of EAs comprises altering a portion of each PTEG address in the first set of PTEG addresses to obtain the third set of PTEG addresses.

3. The method of claim 1 , further comprising:
generating a set of test cases using the first set of EAs and the first set of PTEG addresses; and
executing the set of test cases.

4. The method of claim 1 , wherein the translation of the second set of effective addresses is generated algorithmically without applying the hash function.

5. The method of claim 1 , wherein each of the first set of EAs is mapped to a first page table entry (PTE) in each of the first set of PTEGs, and wherein each of the second set of EAs is mapped to a second PTE in each of the first set of PTEGs.

6. The method of claim 1 , wherein the first set of PTEGs is a consecutive set of PTEGs in a page table.

7. The method of claim 1 , wherein each PTE in a PTEG in the first set of PTEGs comprises a same real page.

8. An apparatus for efficiently generating effective address translations for memory management test cases, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out:
obtaining a first set of effective addresses (EAs), wherein each EA comprises an effective segment identifier (‘ID’) and a page, wherein each effective segment ID of each EA in the first set of EAs is mapped to a same first effective segment;
obtaining a set of virtual address corresponding to the first set of EAs, wherein each virtual segment ID of each virtual address in the first set of virtual addresses is mapped to a same virtual segment;
translating the first set of EAs by applying a hash function to each virtual address in the set of virtual addresses to obtain a first set of page table entry group (PTEG) addresses mapped to a first set of PTEGs; and
generating a translation for a second set of EAs to obtain a second set of PTEG addresses mapped to the first set of PTEGs, wherein each effective segment ID of each EA in the second set of EAs is mapped to a same second effective segment.

9. The apparatus of claim 8 , the computer program instructions causing the apparatus to carry out:
generating a translation for a third set of EAs to obtain a third set of PTEG addresses mapped to a second set of PTEGs, wherein translating the third set of EAs comprises altering a portion of each PTEG address in the first set of PTEG addresses to obtain the third set of PTEG addresses.

10. The apparatus of claim 8 , the computer program instructions causing the apparatus to carry out:
generating a set of test cases using the first set of EAs and the first set of PTEG addresses; and
executing the set of test cases.

11. The apparatus of claim 8 , wherein the translation of the second set of effective addresses is generated algorithmically without applying the hash function.

12. The apparatus of claim 8 , wherein each of the first set of EAs is mapped to a first page table entry (PTE) in each of the first set of PTEGs, and wherein each of the second set of EAs is mapped to a second PTE in each of the first set of PTEGs.

13. The apparatus of claim 8 , wherein the first set of PTEGs is a consecutive set of PTEGs in a page table.

14. The apparatus of claim 8 , wherein each PTE in a PTEG in the first set of PTEGs comprises a same real page.

15. A computer program product for efficiently generating effective address translations for memory management test cases, the computer program product disposed upon a computer readable storage medium, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out:
obtaining a first set of effective addresses (EAs), wherein each EA comprises an effective segment identifier (ID) and a page, wherein each effective segment ID of each EA in the first set of EAs is mapped to a same first effective segment;
obtaining a set of virtual address corresponding to the first set of EAs, wherein each virtual segment ID of each virtual address in the first set of virtual addresses is mapped to a same virtual segment;
translating the first set of EAs by applying a hash function to each virtual address in the set of virtual addresses to obtain a first set of page table entry group (PTEG) addresses mapped to a first set of PTEGs; and
generating a translation for a second set of EAs to obtain a second set of PTEG addresses mapped to the first set of PTEGs, wherein each effective segment ID of each EA in the second set of EAs is mapped to a same second effective segment.

16. The computer program product of claim 15 , the computer program instructions causing the computer to carry out:
generating a translation for a third set of EAs to obtain a third set of PTEG addresses mapped to a second set of PTEGs, wherein translating the third set of EAs comprises altering a portion of each PTEG address in the first set of PTEG addresses to obtain the third set of PTEG addresses.

17. The computer program product of claim 15 , the computer program instructions causing the computer to carry out:
generating a set of test cases using the first set of EAs and the first set of PTEG addresses; and
executing the set of test cases.

18. The computer program product of claim 15 , wherein the translation of the second set of effective addresses is generated algorithmically without applying the hash function.

19. The computer program product of claim 15 , wherein each of the first set of EAs is mapped to a first page table entry (PTE) in each of the first set of PTEGs, and wherein each of the second set of EAs is mapped to a second PTE in each of the first set of PTEGs.

20. The computer program product of claim 15 , wherein the first set of PTEGs is a consecutive set of PTEGs in a page table.

Assignees

• IBM

Inventors

• Dusanapudi Manoj
• Kapoor Shakti

Classifications

• G06F12/1018 Primary

  involving hashing techniques, e.g. inverted page tables · CPC title

• G06F2212/152

  Virtualized environment, e.g. logically partitioned system · CPC title

• G06F2212/651

  Multi-level translation tables · CPC title

• G06F2212/1056

  Simplification · CPC title

• G06F2212/657

  Virtual address space management · CPC title