Method for manufacturing a membrane assembly

Patent metadata

Field	Value
Publication number	US-10712656-B2
Application number	US-201615752302-A
Country	US
Kind code	B2
Filing date	Aug 26, 2016
Priority date	Sep 2, 2015
Publication date	Jul 14, 2020
Grant date	Jul 14, 2020

Abstract

A method for manufacturing a membrane assembly for EUV lithography, the method comprising: providing a stack comprising a planar substrate and at least one membrane layer, wherein the planar substrate comprises an inner region and a border region around the inner region; positioning the stack on a support such that the inner region of the planar substrate is exposed; and selectively removing the inner region of the planar substrate using a non-liquid etchant, such that the membrane assembly comprises: a membrane formed from the at least one membrane layer; and a border holding the membrane, the border formed from the border region of the planar substrate.

First claim

The invention claimed is:

1. A method for manufacturing a membrane assembly for EUV lithography, the method comprising:
providing a stack comprising a planar substrate and at least one membrane layer, wherein the planar substrate comprises an inner region, a border region around the inner region, a bridge region around the border region and an edge region around the bridge region;
forming a bridge groove through the at least one membrane layer adjacent the bridge region of the planar substrate;
selectively removing the inner region and the bridge region of the planar substrate, such that the membrane assembly comprises:
a membrane formed from the at least one membrane layer,
a border holding the membrane, the border formed from the border region of the planar substrate,
an edge section around the border, the edge section formed from the edge region of the planar substrate, and
a bridge between the border and the edge section, the bridge formed by the at least one membrane layer; and

separating the edge section from the border such that the at least one membrane layer adjacent the edge section is separated from the membrane by the bridge groove.

2. The method of claim 1 , comprising positioning the stack on a support such that the inner region of the planar substrate is exposed, wherein the inner region of the planar substrate is selectively removed, when the stack is on the support, using a non-liquid etchant.

3. The method of claim 2 , wherein the inner region of the planar substrate is selectively removed by atomic layer etching, sputter etching, plasma etching, reactive-ion etching or deep reactive-ion etching.

4. The method of claim 1 , wherein:
the stack is provided with a mechanical protection material configured to mechanically protect the border region during the step of selectively removing the inner region of the planar substrate; and
the mechanical protection material is removed using a fluoride etchant.

5. The method of claim 1 , wherein the stack is rectangular.

6. The method of claim 1 , wherein the bridge groove is formed by cutting through the at least one membrane layer using a laser or EUV radiation.

7. The method of claim 1 , wherein the bridge groove is formed such that part of the at least one membrane layer extends radially outwardly of the border region of the planar substrate, such that when the edge section is separated from the border, the part of the at least one membrane layer extends radially outwardly of the border.

8. The method of claim 1 , comprising applying a passivation coating to the edges of the at least one membrane layer after separating the edge section from the border.

9. The method of claim 8 , wherein the passivation coating comprises one or more selected from: a metal, a silicide, an oxide or a nitride.

10. The method of claim 8 , wherein the passivation coating is applied using physical vapour deposition, and wherein a shadow mask is used such that only the edges of the at least one membrane layer receive the passivation coating.

11. The method of claim 1 , wherein the at least one membrane layer comprises an amorphous material.

12. The method of claim 1 , comprising oxidizing or nitriding the edges of the at least one membrane layer after separating the edge section from the border.

13. The method of claim 1 , wherein the stack is provided with an intermediate layer between the planar substrate and the at least one membrane layer, the method comprising isotropically etching the intermediate layer after the step of selectively removing the inner region of the planar substrate.

14. The method of claim 1 , comprising changing a pre-tension in the at least one membrane layer of the stack by one or more selected from: an annealing process, ion beam modification, controlling a pressure applied to the stack, or controlling a temperature applied to the stack.

15. The method of claim 1 , wherein at least one membrane layer of the stack is a layer comprising tungsten, lead titanate, barium titanate, silicon carbide or molybdenum disilicide.

16. A method for manufacturing a membrane assembly for EUV lithography, the method comprising:
providing a stack comprising a planar substrate and at least one membrane layer, wherein the planar substrate comprises an inner region and a border region around the inner region;
positioning the stack on a support such that the inner region of the planar substrate is exposed;
selectively removing the inner region of the planar substrate using a non-liquid etchant, such that the membrane assembly comprises:
a membrane formed from the at least one membrane layer, and
a border holding the membrane, the border formed from the border region of the planar substrate; and

after the selective removal of the inner region of the planar substrate, separating off a portion of the planar substrate to form the border.

17. The method of claim 16 , wherein:
the planar substrate comprises a bridge region around the border region and an edge region around the bridge region;
a bridge groove is formed through the at least one membrane layer adjacent the bridge region of the planar substrate; and
the membrane assembly comprises:
an edge section around the border, the edge section formed from the edge region of the planar substrate, and
a bridge between the border and the edge section, the bridge formed by the at least one membrane layer; and

the separating off the portion of the substrate comprises separation of the edge section from the border such that the at least one membrane layer adjacent the edge section is separated from the membrane by the bridge groove.

18. A method for manufacturing a membrane assembly for EUV lithography, the method comprising:
providing a stack comprising a planar substrate and at least one membrane layer, wherein the planar substrate comprises an inner region and a border region around the inner region; and
selectively removing the inner region of the planar substrate, such that the membrane assembly comprises:
a membrane formed from the at least one membrane layer, and
a border holding the membrane, the border formed from the border region of the planar substrate,
wherein the stack is provided with a mechanical protection material configured to mechanically protect the border region during the step of selectively removing the inner region of the planar substrate; and

removing essentially of the mechanical protection material using a fluoride etchant.

19. A membrane assembly for EUV lithography, the membrane assembly comprising a membrane formed from at least one membrane layer comprising silicon and a border holding the membrane, wherein:
edges of the at least one membrane layer in the stack are rounded or chamfered, at least one of the edges defining the intersection between a major surface of the membrane layer and a minor side surface of the membrane layer and rounding or chamfering of the at least one edge extending from the major surface toward the minor side surface; and/or
part of the at least one membrane layer extends radially outwardly of the border; and/or
a passivation coating is applied to the edges of the at least one membrane layer; and/or
the edges of the at least one membrane layer are oxidized or nitrided.

20. The membrane assembly of claim 19 , wherein when the passivation coating is applied to the edges of the at least one membrane layer, the passivation coating comprises Ru.

21. The membrane assembly of claim 19 , wherein the membrane assembly is for a pa

Assignees

• Asml Netherlands Bv

Inventors

• Houweling Zomer Silvester
• Casimiri Eric Willem Felix
• Druzhinina Tamara
• Janssen Paul
• Kuijken Michael Alfred Josephus
• Leenders Martinus Hendrikus Antonius
• Oosterhoff Sicco
• Péter Mária
• Van Der Zande Willem Joan
• Van Zwol Pieter-Jan
• Verbrugge Beatrijs Louise Marie-Joseph Katrien
• Vermeulen Johannes Petrus Martinus Bernardus
• Vles David Ferdinand
• Voorthuijzen Willem-Pieter

Classifications

• H10P50/242

  of Group IV materials · CPC title

• H10P76/00

  Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography · CPC title

• G03F1/62 Primary

  Pellicles, e.g. pellicle assemblies, e.g. having membrane on support frame; Preparation thereof · CPC title

• G03F1/80

  Etching · CPC title

• G03F7/70983

  Optical system protection, e.g. pellicles or removable covers for protection of mask · CPC title