Wiring board
US-9820391-B2 · Nov 14, 2017 · US
Wiring substrate
US10707178B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10707178-B2 |
| Application number | US-201916423370-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 28, 2019 |
| Priority date | Jun 7, 2018 |
| Publication date | Jul 7, 2020 |
| Grant date | Jul 7, 2020 |
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- Title
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- Abstract
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- Assignees and inventors
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- First independent claim
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- CPC / IPC classifications
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- Citations and related patents
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Abstract
Official abstract text for this publication.
A wiring substrate includes: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via an adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other. A pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side. When being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite.
First claim
Opening claim text (preview).
What is claimed is: 1. A wiring substrate comprising: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via a first adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other, and one or more second adhesives, wherein the carrier has a configuration in which the plurality of layers and the one or more second adhesives are alternately layered, wherein a pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side, and wherein, with respect to the layers included in the carrier, the coefficients of thermal expansion decrease in accordance with proximity to the wiring member such that when being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite. 2. The wiring substrate according to claim 1 , wherein, when being heated, the wiring member tends to warp in a convex shape on the carrier. 3. The wiring substrate according to claim 1 , wherein a number of layers included in the carrier is three or more. 4. The wiring substrate according to claim 1 , wherein a strength of adhesion of the second adhesives is lower than that of the first adhesive. 5. A wiring substrate comprising: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; a carrier that is bonded to the first surface via a first adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other, and one or more second adhesives, wherein the carrier has a configuration in which the plurality of layers and the one or more second adhesives are alternately layered, wherein a pitch of wires included in the plurality of wiring layers is narrower on the second surface side than on the first surface side, and wherein with respect to the layers included in the carrier, the coefficients of thermal expansion increase in accordance with proximity to the wiring member such that when being heated, a direction in which the wiring member tends to warp and a direction in which the carrier tends to warp are opposite. 6. The wiring substrate according to claim 5 , wherein, when being heated, the wiring member tends to warp in a concave shape on the carrier. 7. The wiring substrate according to claim 5 , wherein a number of layers included in the carrier is three or more. 8. The wiring substrate according to claim 5 , wherein a strength of adhesion of the second adhesives is lower than that of the first adhesive.
Assignees
Inventors
Classifications
Soldering or alloying · CPC title
of bump connectors · CPC title
Temporary substrates, e.g. removable substrates · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu · CPC title
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What does patent US10707178B2 cover?
- A wiring substrate includes: a wiring member that includes a first surface and a second surface, the wiring member including a plurality of wiring layers between the first surface and the second surface; and a carrier that is bonded to the first surface via an adhesive and that includes a plurality of layers whose coefficients of thermal expansion are different from each other. A pitch of wires…
- Who is the assignee on this patent?
- Shinko Electric Ind Co
- What technology area does this patent fall under?
- Primary CPC classification H10W70/05. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jul 07 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 4 related publications on this page (citations in our corpus or others sharing the same primary CPC).