Interconnect structures with airgaps and dielectric-capped interconnects

Patent metadata

Field	Value
Publication number	US-10707119-B1
Application number	US-201916246847-A
Country	US
Kind code	B1
Filing date	Jan 14, 2019
Priority date	Jan 14, 2019
Publication date	Jul 7, 2020
Grant date	Jul 7, 2020

Abstract

Structures that include interconnects and methods for forming a structure that includes interconnects. A metallization level includes a metallization level having a first interconnect with a first top surface, a second interconnect with a second top surface, and a cavity with an entrance between the first interconnect and the second interconnect. A first dielectric layer includes a first section arranged on the first top surface of the first interconnect and a second section arranged on the second top surface of the second interconnect. The first section of the first dielectric layer is separated from the second section of the first dielectric layer by the entrance of the cavity. A second dielectric layer is arranged to surround the cavity and to close the entrance to the cavity in order to encapsulate an airgap inside the cavity.

First claim

What is claimed is:

1. A structure comprising:
a metallization level including an interlayer dielectric layer, a first interconnect having a first top surface, a second interconnect having a second top surface, and a cavity with an entrance between the first interconnect and the second interconnect;
a first dielectric layer including a first section arranged on the first top surface of the first interconnect, a second section arranged on the second top surface of the second interconnect, and a third section arranged on the interlayer dielectric layer, the first section of the first dielectric layer separated from the second section of the first dielectric layer by the entrance of the cavity; and
a second dielectric layer arranged to surround the cavity and to close the entrance to the cavity in order to encapsulate an airgap inside the cavity,
wherein the first section and the second section of the first dielectric layer are comprised of aluminum nitride, and the third section of the first dielectric layer is comprised of aluminum oxynitride.

2. The structure of claim 1 wherein the first interconnect and the second interconnect are comprised of copper.

3. The structure of claim 1 further comprising:
a third dielectric layer arranged at least in part over the first section and the second section of the first dielectric layer, the third dielectric layer including an opening arranged over the cavity.

4. The structure of claim 1 wherein the first dielectric layer is comprised of a dielectric material, the interlayer dielectric layer has a top surface, the first top surface of the first interconnect and the second top surface of the second interconnect are substantially coplanar with the top surface of the interlayer dielectric layer, and the top surface of the interlayer dielectric layer laterally between the first interconnect and the second interconnect is free of the dielectric material of the first dielectric layer.

5. The structure of claim 1 wherein the second dielectric layer is further arranged over the first section and the second section of the first dielectric layer.

6. The structure of claim 1 wherein the first top surface of the first interconnect has a first surface area, the first section of the first dielectric layer has a first area that is substantially equal to the first surface area, the second top surface of the second interconnect has a second surface area, and the second section of the first dielectric layer has a second area that is substantially equal to the second surface area.

7. The structure of claim 1 wherein the first section of the first dielectric layer is arranged in direct contact with the first top surface of the first interconnect, and the second section of the first dielectric layer is arranged in direct contact with the second top surface of the second interconnect.

8. A method comprising:
forming a metallization level including a first interconnect and a second interconnect in an interlayer dielectric layer;
depositing a first section of a first dielectric layer on a first top surface of the first interconnect a second section of the first dielectric layer on a second top surface of the second interconnect, and a third section on a first portion of the interlayer dielectric layer;
removing the third section of the first dielectric layer selective to the first section and the second section of the first dielectric layer to expose the first portion of the interlayer dielectric layer;
removing the first portion of the interlayer dielectric layer to form a cavity with an entrance between the first interconnect and the second interconnect; and
depositing a second dielectric layer on surfaces surrounding the cavity that pinches off to encapsulate an airgap inside the cavity,
wherein the first section and the second section of the first dielectric layer are comprised of aluminum nitride, and the third section of the first dielectric layer is comprised of aluminum oxynitride.

9. The method of claim 8 further comprising:
heating the first dielectric layer with an annealing process,
wherein the third section of the first dielectric layer increases in thickness during the annealing process.

10. The method of claim 8 further comprising:
depositing a third dielectric layer arranged at least in part over the first section and the second section of the first dielectric layer,
wherein the third dielectric layer includes an opening arranged over the first portion of the interlayer dielectric layer.

11. The method of claim 8 wherein the second dielectric layer is arranged over the first section and the second section of the first dielectric layer.

12. The method of claim 8 further comprising:
depositing a third dielectric layer arranged at least in part over the first section and the second section of the first dielectric layer,
wherein the third dielectric layer includes an opening arranged over the first portion of the interlayer dielectric layer, and the third dielectric layer is arranged in part between the second dielectric layer and the first section and the second section of the first dielectric layer.

13. The method of claim 8 further comprising:
depositing a third dielectric layer arranged at least in part over the first section, the second section, and the third section of the first dielectric layer,
wherein the third dielectric layer includes an opening arranged over the first portion of the interlayer dielectric layer.

14. The method of claim 8 wherein removing the first portion of the interlayer dielectric layer to form the cavity with the entrance between the first interconnect and the second interconnect comprises:
damaging the first portion of the interlayer dielectric layer; and
etching the first portion of the interlayer dielectric layer selective to a second portion of the interlayer dielectric layer beneath the first portion of the interlayer dielectric layer with an etching process,
wherein the first section of the first dielectric layer and the second section of the first dielectric layer respectively mask the first interconnect and the second interconnect during the etching process.

Assignees

• Globalfoundries Inc

Inventors

• Licausi Nicholas V
• Wahl Jeremy A
• Kamineni Vimal K

Classifications

• H10W20/098

  by filling between adjacent conductive parts · CPC title

• H10W20/097

  by thermally treating · CPC title

• H10W20/48

  Insulating materials thereof · CPC title

• H10W20/47

  comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title

• H10W20/43

  Layouts of interconnections · CPC title