Multilayer directional coupler

US10700404B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10700404-B2
Application numberUS-201815997972-A
CountryUS
Kind codeB2
Filing dateJun 5, 2018
Priority dateNov 29, 2017
Publication dateJun 30, 2020
Grant dateJun 30, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

There is provided a multilayer directional coupler formed in a wireless communications device formed by stacking a plurality of substrates, comprising a first conductive pattern formed on a first substrate among the plurality of substrates; and a second conductive pattern formed on a second substrate stacked on one surface of the first substrate and having one or more conductive lines overlapping the first conductive pattern when viewed in a plane direction.

First claim

Opening claim text (preview).

What is claimed is: 1. A multilayer directional coupler disposed in a wireless communications device formed by stacking a plurality of substrates, the multilayer directional coupler comprising: a first conductive pattern formed on a first substrate among the plurality of substrates; a second conductive pattern formed on a second substrate stacked on a surface of the first substrate and configured to have one or more conductive lines overlapping the first conductive pattern when viewed in a plane direction; an air-gap between the first substrate and the second substrate; and a capacitor connecting the first conductive pattern and the second conductive pattern. 2. The multilayer directional coupler of claim 1 , wherein the first conductive pattern has a first end connected to an input port and a second end connected to a through port, and the second conductive pattern has a first end connected to an isolation port and a second end connected to a coupling port. 3. The multilayer directional coupler of claim 2 , wherein a number of ports of the directional coupler is greater than four. 4. The multilayer directional coupler of claim 1 , wherein the first conductive pattern comprises: a first partial pattern extending in a first direction; a first terminal pattern having a first end connected to a first via electrode; and a second terminal pattern having a first end connected to a second via electrode. 5. The multilayer directional coupler of claim 4 , wherein a first end of the first partial pattern is connected to the second end of the first terminal pattern, and the second end of the first partial pattern is connected to the second end of the second terminal pattern. 6. The multilayer directional coupler of claim 4 , wherein the first conductive pattern comprises: a first connection pattern connected to a first end of the first partial pattern and the second end of the first terminal pattern; and a second connection pattern connected to the second end of the first partial pattern and the second end of the second terminal pattern. 7. The multilayer directional coupler of claim 4 , wherein the second conductive pattern comprises: a second partial pattern at least partially overlapping the first partial pattern when viewed in the plane direction. 8. The multilayer directional coupler of claim 1 , wherein the capacitor comprises a first end connected to the first conductive pattern and a second end connected to the second conductive pattern. 9. The multilayer directional coupler of claim 8 , wherein the capacitor is disposed on an uppermost layer among the plurality of substrates and has the first end connected to the first conductive pattern through a first via electrode and the second end connected to the second conductive pattern through a second via electrode. 10. The multilayer directional coupler of claim 1 , further comprising a third conductive pattern disposed on a third substrate stacked on a surface of the second substrate and configured to have one or more conductive lines overlapping with at least one of the first conductive pattern and the second conductive pattern when viewed in the plane direction. 11. The multilayer directional coupler of claim 1 , wherein capacitance between the first conductive pattern and the second conductive pattern is adjusted by controlling capacitance values of the capacitor. 12. A multilayer directional coupler disposed in a wireless communications device formed by stacking a plurality of substrates, the multilayer directional coupler comprising: a first conductive pattern formed on a first substrate among the plurality of substrates; a second conductive pattern formed on a second substrate stacked on a surface of the first substrate and configured to have one or more conductive lines overlapping the first conductive pattern when viewed in a plane direction; a third conductive pattern formed on a third substrate stacked on a surface of the second substrate and configured to have one or more conductive lines overlapping with at least one of the first conductive pattern and the second conductive pattern when viewed in the plane direction; a first capacitor connecting the first conductive pattern and the second conductive pattern; and a second capacitor connecting the second conductive pattern and the third conductive pattern. 13. The multilayer directional coupler of claim 12 , wherein the first conductive pattern has a first end connected to a first input port and a second end connected to a first through port, the second conductive pattern has a first end connected to an isolation port and a second end connected to a coupling port, and the third conductive pattern has a first end connected to a second input port and a second end connected to a second through port. 14. The multilayer directional coupler of claim 12 , wherein the first conductive pattern comprises: a first partial pattern extending in a first direction; a first terminal pattern having a first end connected to a first via electrode; and a second terminal pattern having a first end connected to a second via electrode. 15. The multilayer directional coupler of claim 14 , wherein the second conductive pattern comprises: a second partial pattern at least partially overlapping the first partial pattern when viewed in the plane direction. 16. The multilayer directional coupler of claim 15 , wherein the third conductive pattern comprises: a third partial pattern at least partially overlapping the first partial pattern and the second partial pattern when viewed in the plane direction. 17. The multilayer directional coupler of claim 12 , wherein the first capacitor comprises a first end connected to the first conductive pattern and a second end connected to the second conductive pattern. 18. The multilayer directional coupler of claim 17 , wherein the capacitor is disposed on an uppermost layer among the plurality of substrates and has the first end connected to the first conductive pattern through a first via electrode and the second end connected to the second conductive pattern through a second via electrode. 19. The multilayer directional coupler of claim 12 , wherein the second capacitor comprises a first end connected to the third conductive pattern and a second end connected to the second conductive pattern. 20. The multilayer directional coupler of claim 12 , further comprising at least one air-gap between the first substrate, the second substrate, and the third substrate.

Assignees

Inventors

Classifications

  • H01P5/187Primary

    Broadside coupled lines · CPC title

  • H01P5/18Primary

    consisting of two coupled guides, e.g. directional couplers · CPC title

  • for linking dissimilar lines or devices (H01P1/16, H01P5/04 take precedence; linking lines of the same kind but with different dimensions H01P5/02) · CPC title

  • Coaxial-line/strip-line transitions · CPC title

  • H01P5/183Primary

    at least one of the guides being a coaxial line · CPC title

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What does patent US10700404B2 cover?
There is provided a multilayer directional coupler formed in a wireless communications device formed by stacking a plurality of substrates, comprising a first conductive pattern formed on a first substrate among the plurality of substrates; and a second conductive pattern formed on a second substrate stacked on one surface of the first substrate and having one or more conductive lines overlappi…
Who is the assignee on this patent?
Samsung Electro Mech
What technology area does this patent fall under?
Primary CPC classification H01P5/187. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 30 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).