Front-end-of-line shape merging cell placement and optimization

Patent metadata

Field	Value
Publication number	US-10699050-B2
Application number	US-201815969841-A
Country	US
Kind code	B2
Filing date	May 3, 2018
Priority date	May 3, 2018
Publication date	Jun 30, 2020
Grant date	Jun 30, 2020

Abstract

A technique relates to structuring a semiconductor device. First empty cells are placed against hierarchical boundaries of a macro block. Functional cells are added in the macro block. Remaining areas are filled with second empty cells in the macro block. Shape requirements are determined for the first empty cells and the second empty cells. The first and second empty cells are replaced with determined shape requirements.

First claim

What is claimed is:

1. A method of structuring a semiconductor device, the method comprising:
placing, by a computer system, first empty cells against hierarchical boundaries of a macro block;
adding, by a computer system, functional cells in the macro block;
filling, by a computer system, remaining areas with second empty cells in the macro block;
determining, by a computer system, shape requirements for the first empty cells and the second empty cells, the shape requirements comprising threshold voltage requirements, the threshold voltage requirements being determined for a least one or more of the second empty cells based on adjacent ones of the functional cells; and
replacing, by a computer system, the first and second empty cells with determined shape requirements.

2. The method of claim 1 , further comprising detecting at least one functional cell as at least one critical cell.

3. The method of claim 2 , further comprising identifying any cells bordering the at least one functional cell as one or more identified cells.

4. The method of claim 3 , further comprising determining that the one or more identified cells have a different shape requirement than the at least one functional cell.

5. The method of claim 4 , further comprising in response to the one or more identified cells having the different shape requirement being one of more of the first empty cells and the second empty cells, changing the one or more identified cells to a same shape requirement as the at least one functional cell.

6. The method of claim 5 , wherein the same shape requirement comprises a level for a threshold voltage.

7. The method of claim 4 , further comprising in response to the one or more identified cells having the different shape requirement being one or more of the functional cells, moving the one or more identified cells to a location that does not border the at least one functional cell.

8. The method of claim 1 , wherein the threshold voltage requirements for the at least one or more of the second empty cells are based on a level of a threshold voltage for the adjacent ones of the functional cells.

9. A computer program product for structuring a semiconductor device, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions executable by a computer, to cause the computer to perform a method comprising:
placing first empty cells against hierarchical boundaries of a macro block;
adding functional cells in the macro block;
filling remaining areas with second empty cells in the macro block;
determining shape requirements for the first empty cells and the second empty cells, the shape requirements comprising threshold voltage requirements, the threshold voltage requirements being determined for at least one or more of the second empty cells based on adjacent ones of the functional cells; and
replacing the first and second empty cells with determined shape requirements.

10. The computer program product of claim 9 , further comprising detecting at least one functional cell as at least one critical cell.

11. The computer program product of claim 10 , further comprising identifying any cells bordering the at least one functional cell as one or more identified cells.

12. The computer program product of claim 11 , further comprising determining that the one or more identified cells have a different shape requirement than the at least one functional cell.

13. The computer program product of claim 12 , further comprising in response to the one or more identified cells having the different shape requirement being one or more of the first empty cells and the second empty cells, changing the one or more identified cells to a same shape requirement as the at least one functional cell.

14. The computer program product of claim 13 , wherein the same shape requirement comprises a level for a threshold voltage.

15. The computer program product of claim 12 , further comprising in response to the one or more identified cells having the different shape requirement being one of more of the functional cells, moving the one or more identified cells to a location that does not border the at least one functional cell.

16. A computing system for structuring a semiconductor device, the computing system comprising:
at least one processor; and
memory comprising computer-executable instructions that, when executed by the at least one processor, cause the at least one processor to perform operations comprising:
placing first empty cells against hierarchical boundaries of a macro block;
adding functional cells in the macro block;
filling remaining areas with second empty cells in the macro block;
determining shape requirements for the first empty cells and the second empty cells, the shape requirements comprising threshold voltage requirements, the threshold voltage requirements being determined for at least one or more of the second empty cells based on adjacent ones of the functional cells; and
replacing the first and second empty cells with determined shape requirements.

17. The computing system of claim 16 , further comprising detecting at least one functional cell as at least one critical cell.

18. The computer system of claim 17 , further comprising identifying any cells bordering the at least one functional cell as one or more identified cells.

19. The computer system of claim 18 , further comprising determining that the one or more identified cells have a different shape requirement than the at least one functional cell; and
in response to the one or more identified cells having the different shape requirement being one or more of the first empty cells and the second empty cells, changing the one or more identified cells to a same shape requirement as the at least one functional cell.

Assignees

• IBM

Inventors

• Wolpert David
• Behnen Erwin
• Clevenger Lawrence A
• Watson Patrick
• Yang Chih-Chao
• Schell Timothy A

Classifications

• H10D89/10

  Integrated device layouts · CPC title

• G06F30/392 Primary

  Floor-planning or layout, e.g. partitioning or placement · CPC title

• G06F30/398 Primary

  Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) · CPC title

• G06F30/394

  Routing (G06F30/396 takes precedence) · CPC title

• H01L27/0207

  Electricity · mapped topic