Power amplifying apparatus with wideband linearity

Patent metadata

Field	Value
Publication number	US-10693424-B2
Application number	US-201816146170-A
Country	US
Kind code	B2
Filing date	Sep 28, 2018
Priority date	Dec 27, 2017
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

A power amplifying apparatus includes a first bias circuit configured to generate a first bias current, a first amplification circuit, configured to receive the first bias current, amplify a signal input to the first amplification circuit through a first node, and output a first amplified signal to a second node, a second bias circuit, configured to generate a second bias current which has a magnitude different from a magnitude of the first bias current, and a second amplification circuit, connected in parallel with the first amplification, configured to receive the second bias current, amplify the signal input through the first node, and output a second amplified signal to the second node. The second amplification circuit is configured to output the second amplified signal with a third-harmonic component that has a phase offsetting a third-order intermodulation distortion (IM3) component included in the first amplified signal, based on the second bias current.

First claim

What is claimed is:

1. A power amplifying apparatus comprising:
a first bias circuit configured to generate a first bias current;
a first amplification circuit configured to receive the first bias current from the first bias circuit and an input signal input through a first node, amplify the input signal, and output a first amplified signal to a second node;
a second bias circuit configured to generate a second bias current having a magnitude different from a magnitude of the first bias current; and
a second amplification circuit connected in parallel with the first amplification circuit and configured to receive the second bias current from the second bias circuit and the input signal input through the first node, amplify the input signal, and output a second amplified signal to the second node,
wherein the second amplification circuit is further configured so that the second bias current causes the second amplified signal to comprise a third-order intermodulation distortion (IM3) component having a phase offsetting a third-order intermodulation distortion (IM3) component included in the first amplified signal.

2. The power amplifying apparatus of claim 1 , wherein the magnitude of the second bias current is less than the magnitude of the first bias current.

3. The power amplifying apparatus of claim 1 , wherein the magnitude of the second bias current is greater than the magnitude of the first bias current.

4. The power amplifying apparatus of claim 1 , wherein the first bias current is a bias current of class AB, and
the second bias current is a bias current of deep class AB between class AB and class B.

5. The power amplifying apparatus of claim 1 , wherein the magnitude of the second bias current corresponds to a fundamental frequency included in the input signal.

6. The power amplifying apparatus of claim 1 , wherein the second bias circuit is further configured to vary the second bias current through current sourcing or current sinking according to an increase or a decrease of a fundamental frequency included in the input signal.

7. The power amplifying apparatus of claim 1 , wherein the second bias circuit is further configured to vary the second bias current in response to a variation of a fundamental frequency included in the input signal.

8. The power amplifying apparatus of claim 1 , wherein the second bias circuit is a variable bias circuit.

9. A power amplifying apparatus comprising:
a drive bias circuit configured to generate a drive bias current;
a drive amplification circuit configured to receive the drive bias current, amplify an input signal comprising a first frequency component and a second frequency component, and output an amplified signal to a first node;
a first bias circuit configured to generate a first bias current;
a first amplification circuit configured to receive the first bias current from the first bias circuit and the amplified signal from the first node, amplify the amplified signal received from the first node, and output a first amplified signal to a second node;
a second bias circuit configured to generate a second bias current having a magnitude different from a magnitude of the first bias current; and
a second amplification circuit connected in parallel with the first amplification circuit and configured to receive the second bias current from the second bias circuit and the amplified signal from the first node, amplify the amplified signal received from the first node, and output a second amplified signal to the second node,
wherein the second amplification circuit is further configured so that the second bias current causes the second amplified signal to comprise a third-order intermodulation distortion (IM3) component having a phase offsetting a third-order intermodulation distortion (IM3) component included in the first amplified signal.

10. The power amplifying apparatus of claim 9 , wherein the magnitude of the second bias current is less than the magnitude of the first bias current.

11. The power amplifying apparatus of claim 9 , wherein the magnitude of the second bias current is greater than the magnitude of the first bias current.

12. The power amplifying apparatus of claim 9 , wherein the first bias current is a bias current of class AB, and
the second bias current is a bias current of deep class AB between class AB and class B.

13. The power amplifying apparatus of claim 9 , wherein the magnitude of the second bias current corresponds to a fundamental frequency included in the input signal.

14. The power amplifying apparatus of claim 9 , wherein the second bias circuit is further configured to vary the second bias current through current sourcing or current sinking according to an increase or a decrease of a fundamental frequency included in the input signal.

15. The power amplifying apparatus of claim 9 , wherein the second bias circuit is further configured to vary the second bias current in response to a variation of a fundamental frequency included in the input signal.

16. The power amplifying apparatus of claim 9 , wherein the second bias circuit is a variable bias circuit.

17. A power amplifying apparatus comprising:
a first amplifier configured to receive a first bias current and an input signal comprising two frequency components, and generate a first amplified signal based on the first bias current and the input signal;
a variable bias circuit configured to generate a second bias current; and
a second amplifier connected in parallel with the first amplifier and configured to receive the second bias current and the input signal, and generate a second amplified signal based on the second bias current and the input signal,
wherein the second amplified signal comprises a third-order intermodulation distortion (IM3) component having a phase that offsets a third-order intermodulation distortion (IM3) component included in the first amplified signal, and
the second amplification circuit is further configured so that the second bias current causes the second amplified signal to comprise the third-order intermodulation distortion (IM3) component having the phase offsetting the third-order intermodulation distortion (IM3) component included in the first amplified signal.

18. The power amplifying apparatus of claim 17 , wherein the variable bias circuit is further configured to adjust a magnitude of the second bias current based on a fundamental frequency included in the input signal.

19. The power amplifying apparatus of claim 17 , wherein the variable bias circuit comprises:
a current sink circuit configured to decrease the second bias current in response to a decrease in a fundamental frequency included in the input signal; and
a current source circuit configured to increase the second bias current in response to an increase in the fundamental frequency included in the input signal.

Assignees

• Samsung Electro Mech

Inventors

• Choi Kyu Jin

Classifications

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title

• H03F1/32

  Modifications of amplifiers to reduce non-linear distortion (by negative feedback H03F1/34) · CPC title

• H03F1/0211 Primary

  with control of the supply voltage or current · CPC title

• H03F1/3223 Primary

  using feed-forward (H03F1/3211 takes precedence) · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title