Systems and methods for shielded inductive devices

Patent metadata

Field	Value
Publication number	US-10692963-B2
Application number	US-201815965476-A
Country	US
Kind code	B2
Filing date	Apr 27, 2018
Priority date	Jan 30, 2018
Publication date	Jun 23, 2020
Grant date	Jun 23, 2020

Abstract

In an embodiment, a circuit includes: a transformer defining an inductive footprint within a first layer; a grounded shield bounded by the inductive footprint within a second layer separate from the first layer; and a circuit component bounded by the inductive footprint within a third layer separate from the second layer, wherein: the circuit component is coupled with the transformer through the second layer, and the third layer is separated from the first layer by the second layer.

First claim

What is claimed is:

1. A circuit, comprising:
a transformer defining an inductive footprint within a first layer;
a grounded shield laterally bounded by the inductive footprint so as to be surrounded by an outer perimeter of the inductive footprint, wherein the grounded shield is formed within a second layer separate from the first layer; and
a circuit component laterally bounded by the inductive footprint so as to be surrounded by the outer perimeter of the inductive footprint, wherein the circuit component is formed within a third layer separate from the second layer, wherein:
the circuit component is coupled with the transformer through the second layer,
the third layer is separated from the first layer by the second layer, and
the circuit component is laterally surrounded by winding structures of the transformer.

2. The circuit of claim 1 , wherein the grounded shield comprises a grounded conductive material.

3. The circuit of claim 1 , wherein the inductive footprint comprises an octagonal shape.

4. The circuit of claim 1 , wherein the transformer and the circuit component are part of an oscillator or an amplifier.

5. The circuit of claim 1 , wherein a port of the transformer faces within winding structures of the transformer.

6. The circuit of claim 1 , wherein the transformer comprises at least two inductors.

7. The circuit of claim 1 , wherein the circuit is part of an integrated fan out (InFO) package.

8. A circuit, comprising:
an inductor defining an inductive footprint within a first layer;
a grounded shield laterally bounded by the inductive footprint so as to be surrounded by an outer perimeter of the inductive footprint, wherein the grounded shield is formed within a second layer separate from the first layer; and
a circuit component laterally bounded by the inductive footprint so as to be surrounded by an outer perimeter of the inductive footprint, wherein the circuit component is formed within a third layer separate from the second layer, wherein:
the circuit component is coupled with the inductor through the second layer,
the third layer is separated from the first layer by the second layer, and
the circuit component is laterally surrounded by winding structures of the transformer.

9. The circuit of claim 8 , wherein the first layer, the second layer, and the third layer are metallization layers of an integrated circuit.

10. The circuit of claim 8 , wherein the circuit component is a buffer, a divider, or a capacitor.

11. The circuit of claim 8 , wherein the inductor and the circuit component are part of a phase lock loop.

12. The circuit of claim 8 , wherein the circuit component is an active device.

13. The circuit of claim 8 , wherein the first layer is above the second layer and the third layer.

14. A circuit, comprising:
an inductor defining an inductive footprint within a first layer;
a grounded shield laterally bounded by the inductive footprint so as to be surrounded by an outer perimeter of the inductive footprint, wherein the grounded shield is formed within a second layer separate from the first layer; and
a circuit component laterally bounded by the inductive footprint so as to be surrounded by an outer perimeter of the inductive footprint, wherein the circuit component is formed within a third layer separate from the second layer, wherein:
the circuit component is coupled with the inductor through the second layer,
the third layer is separated from the first layer by the second layer,
the circuit component is laterally surrounded by winding structures of the transformer, and
the first layer, the second layer, and the third layer are metallization layers of an integrated circuit.

15. The circuit of claim 14 , wherein the inductor and the circuit component are part of a frequency synthesizer.

16. The circuit of claim 14 , wherein a port of the inductor faces within winding structures of the inductor.

17. The circuit of claim 14 , wherein the inductor and the circuit component are part of a phase lock loop that comprises an oscillator or an amplifier.

18. The circuit of claim 14 , wherein the first layer comprises additional circuit components bound within the inductive footprint.

19. The circuit of claim 14 , wherein the first layer is below the second layer and the third layer.

20. The circuit of claim 14 , wherein the circuit component is a buffer, a divider, or a capacitor.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Kuo Feng Wei
• Jou Chewn-Pu
• Chen Huan-Neng
• Cho Lan-Chou
• Staszewski Robert Bogdan

Classifications

• H10W20/497

  Inductive arrangements or effects of, or between, wiring layers · CPC title

• H10D1/20 Primary

  Inductors · CPC title

• C02F2103/343

  from the pharmaceutical industry, e.g. containing antibiotics · CPC title

• C02F2103/32

  from the food or foodstuff industry, e.g. brewery waste waters · CPC title

• C02F2103/28

  from the paper or cellulose industry · CPC title