Display device and chip-on-film structure thereof

Patent metadata

Field	Value
Publication number	US-10672700-B2
Application number	US-201815765188-A
Country	US
Kind code	B2
Filing date	Feb 12, 2018
Priority date	Feb 2, 2018
Publication date	Jun 2, 2020
Grant date	Jun 2, 2020

Abstract

A display device and a chip-on-film structure thereof are provided. The chip-on-film structure includes a substrate, multiple first output pads, multiple second output pads, multiple first lead wires, and multiple second lead wires. The substrate has a surface including a bonding zone. The first and output pads are located in the bonding zone. The first lead wires and the first output pads are located on the same surface of the substrate. The first lead wires and the second lead wires are located on two opposite surfaces of the substrate. Each of the first lead wires is connected to one of the first output pads. Each of the second lead wires is connected to one of the second output pads. The second lead wires each have a portion corresponding to the bonding zone and having the terminal sections that are respectively opposite to the first and second output pads.

First claim

What is claimed is:

1. A chip-on-film structure, comprising a substrate, a plurality of first output pads, a plurality of second output pads, a plurality of first lead wires, and a plurality of second lead wires, the substrate having a surface that comprises a bonding zone, the plurality of first output pads and the plurality of second output pads being located in the bonding zone, the plurality of first lead wires and the plurality of first output pads being located on one common surface of the substrate, the plurality of first lead wires and the plurality of second lead wires being respectively located on two opposite surfaces of the substrate, each of the first lead wires being connected to one of the first output pads, each of the second lead wires being connected to the second output pads, the second lead wires each having a portion that corresponds to the bonding zone and has two terminal sections respectively opposite to the first output pads and the second output pads,
wherein the two terminal sections of each of the second lead wires extend in a predetermined direction and are shifted away from each other in a direction that is perpendicular to the predetermined direction to be respectively in alignment with the first and second output pads, the second lead wire having a connection section connected between the two terminal sections, such that the connection section is inclined with respect to the predetermined direction in which the two terminal sections extend.

2. The chip-on-film structure according to claim 1 , wherein the plurality of first output pads and the plurality of second output pads are arranged to stagger with respect to each other, such that each of the plurality of second output pads is arranged between two adjacent ones of the plurality of first output pads.

3. The chip-on-film structure according to claim 2 , wherein the plurality of first output pads and the plurality of second output pads are respectively arranged in a straight line extending in a first direction, and the plurality of first output pads and the plurality of second output pads are spaced from each other in a second direction, wherein the first direction and the second direction are perpendicular.

4. The chip-on-film structure according to claim 1 , wherein the second lead wires have orthogonal projections on the substrate that cover orthogonal projections of the first lead wires on the substrate.

5. The chip-on-film structure according to claim 1 , wherein the substrate is formed with vias that respectively correspond, in a one to one manner, to the plurality of second output pads, and the second lead wires are connected, through the vias, to the second output pads.

6. The chip-on-film structure according to claim 5 , wherein the bonding zone is located between the vias and the first lead wires.

7. The chip-on-film structure according to claim 1 further comprising a driver chip, wherein the driver chip is located on the same surface of the substrate as the plurality of first lead wires, and the first lead wires and the second lead wires are individually connected to the driver chip.

Assignees

• Wuhan China Star Optoelectronics Semiconductor Display Tech Co Ltd

Inventors

• Luo Jing

Classifications

• H05K2203/1189

  Pressing leads, bumps or a die through an insulating layer · CPC title

• H05K2201/10128

  Display · CPC title

• H05K1/189

  characterised by the use of flexible or folded printed circuits · CPC title

• H01L23/145

  Electricity · mapped topic

• H01L51/56

  Electricity · mapped topic