Bandgap reference circuit for reducing power consumption and method of using the same

US10671108B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-10671108-B2
Application numberUS-201715802663-A
CountryUS
Kind codeB2
Filing dateNov 3, 2017
Priority dateNov 8, 2016
Publication dateJun 2, 2020
Grant dateJun 2, 2020

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

A bandgap reference circuit and method of using the same are provided. The bandgap reference circuit includes a startup component; an output component; and a bandgap core component coupled there-between. The bandgap core component includes a reference point having a voltage associated with an output signal of the output component. A controller is configured for controlling the bandgap core component and the output component to switch between a low power consumption mode and a normal operation mode based on the voltage at the reference point. When the bandgap core component and the output component operate in the normal operation mode, the bandgap reference circuit outputs a stable voltage and has a first power consumption. When the bandgap core component and the output component operate in the low power consumption mode, the bandgap reference circuit has a second power consumption less than the first power consumption.

First claim

Opening claim text (preview).

What is claimed is: 1. A bandgap reference circuit, comprising: a startup component; an output component; a bandgap core component coupled between the startup component and the output component, wherein the bandgap core component includes a reference point, and a voltage at the reference point is associated with an output signal of the output component; a controller configured for controlling the bandgap core component and the output component to switch between a low power consumption mode and a normal operation mode based on the voltage at the reference point; wherein: when the bandgap core component and the output component operate in the normal operation mode, the bandgap reference circuit outputs a stable voltage and has a first power consumption, and when the bandgap core component and the output component operate in the low power consumption mode, the bandgap reference circuit has a second power consumption less than the first power consumption a first switching device coupled between a first voltage supply and a power source terminal of the bandgap core component; a second switching device coupled between the bandgap core component and a ground terminal; a third switching device coupled between the first voltage supply and the power source terminal of the output component; and a fourth switching device coupled between the output component and the ground terminal, wherein: the controller turns on or off the first switching device and the second switching device to control the bandgap core component to operate in the normal operation mode or the low power consumption mode; and the controller turns on or off the third switching device and the fourth switching device to control the output component to operate in the normal operation mode or the low power consumption mode. 2. The bandgap reference circuit of claim 1 , wherein the controller is further configured for: when the bandgap core component operates in the low power consumption mode, detecting the voltage at the reference point starting from a detection timing; and based on the detected voltage at the reference point, generating a low power consumption control signal or a normal operation control signal; wherein the low power consumption control signal controls the bandgap core component and the output component to operate in the low power consumption mode, and the normal operation control signal controls the bandgap core component and the output component to operate in the normal operation mode. 3. The bandgap reference circuit of claim 1 , wherein the detection-starting point is determined based on a duration of the bandgap core component operating in the low power consumption mode in a previous measurement. 4. The bandgap reference circuit of claim 1 , wherein: a changing of the voltage at the reference point in the bandgap core indicates that the output voltage of the output component is going to be unstable. 5. The bandgap reference circuit of claim 1 , wherein the controller is further configured for: in response to determining that the detected voltage at the reference point is larger than a voltage threshold, generating the low power consumption control signal; and in response to determining that the detected voltage at the reference point is less than the voltage threshold, generating the normal operation control signal. 6. The bandgap reference circuit of claim 1 , wherein: the first switching device is a first PMOS transistor; the second switching device is a first NMOS transistor; the third switching device is a second PMOS transistor; and the fourth switching device is a second NMOS transistor; wherein: a source of the first PMOS transistor is coupled to the first voltage supply, a gate of the first PMOS transistor is coupled to an output terminal of the controller, and a drain of the first PMOS transistor is coupled to the bandgap core component, a source of the first NMOS transistor is grounded, a gate of the first NMOS transistor is coupled to an inverted signal of an output signal of the controller, and a drain of the first NMOS transistor is coupled to the reference point, a source of the second PMOS transistor is coupled to the first voltage supply, a gate of the second PMOS transistor is coupled to an output terminal of the controller, and a drain of the second PMOS transistor is coupled to the output component, and a source of the second NMOS transistor is grounded, a gate of the second NMOS transistor is coupled to an inverted signal of an output signal of the controller, and a drain of the second NMOS transistor is coupled to the output component. 7. The bandgap reference circuit of claim 1 , wherein the controller includes: a voltage detection controller, configured for generating a detection enable signal according to the duration of the bandgap core component operating in the low power consumption mode in a previous-measurement; a voltage detector, configured for determining the detection-starting point based on the detection enable signal, detecting the voltage at the reference point starting from the detection starting point, and outputting a first voltage signal according to the detected voltage at the reference point; a latch, configured for latching the first voltage signal outputted by the voltage detector; and a charging time controller, configured for generating a normal operation control signal and a low power consumption control signal based on the first voltage signal latched by the latch. 8. The bandgap reference circuit of claim 7 , wherein: the normal operation control signal is used for turning on the first switching device and the third switching device; and the low power consumption control signal is used for turning off the first switching device and the third switching device. 9. The bandgap reference circuit of claim 7 , wherein the voltage detector includes: a third PMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a fifth NMOS transistor; wherein: a source of the third PMOS transistor is coupled to a second voltage supply, and a gate of the third PMOS transistor is coupled to the detection enable signal, a source of the third NMOS transistor is coupled to a drain of the third PMOS transistor, a gate of the third NMOS transistor is coupled to the reference point, and a drain of the third NMOS transistor is coupled to an input terminal of the latch and is used as an output terminal of the voltage detector, a gate of the fourth NMOS transistor is coupled to the gate of the third NMOS transistor, a drain of the fourth NMOS transistor is coupled with the drain of the third NMOS transistor, and a gate of the fifth NMOS transistor is coupled to an inverted signal of the detection enable signal, a source of the fifth NMOS transistor is grounded, and a drain of the fifth NMOS transistor is coupled to the source of the fourth NMOS transistor. 10. The bandgap reference circuit of claim 7 , wherein the controller further includes: an electrical-level switching device, configured for performing an electrical level switch to the normal operation control signal or the low power consumption control signal generated by the charging time controller, wherein: the normal operation control signal after the electrical level switch is used to turn on the first switching device and the third switching device; and the low power consumption control signal after the electrical level switch is used to turn off the first switching device and the third switching device. 11. The bandgap reference circuit of claim 7 , wherein the voltage detection controller is further configured for: determining a ratio between a duration of the bandg

Assignees

Inventors

Classifications

  • G05F3/247Primary

    producing a voltage or current as a predetermined function of the supply voltage · CPC title

  • Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities (G05F3/26 takes precedence) · CPC title

  • by using a control or a clock signal, e.g. in order to apply power supply · CPC title

  • characterised by reference voltage circuitry, e.g. soft start, remote shutdown · CPC title

  • G05F1/561Primary

    Voltage to current converters (amplifiers H03F) · CPC title

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What does patent US10671108B2 cover?
A bandgap reference circuit and method of using the same are provided. The bandgap reference circuit includes a startup component; an output component; and a bandgap core component coupled there-between. The bandgap core component includes a reference point having a voltage associated with an output signal of the output component. A controller is configured for controlling the bandgap core comp…
Who is the assignee on this patent?
Semiconductor Mfg Int Shanghai Corp, Semiconductor Mfg Int Beijing Corp
What technology area does this patent fall under?
Primary CPC classification G05F3/247. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jun 02 2020 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).