Method and system for continuous off chip capacitor detection for linear regulators
US-9778303-B2 · Oct 3, 2017 · US
US10126770B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-10126770-B2 |
| Application number | US-201815879614-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 25, 2018 |
| Priority date | Mar 10, 2017 |
| Publication date | Nov 13, 2018 |
| Grant date | Nov 13, 2018 |
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A voltage regulator for driving a digital circuit includes an input terminal and an output terminal, a pass device and a first capacitor, and a boost circuit connected to the pass device or to the first capacitor and having a regulator boost input terminal connectable to the boost signal output terminal. The output terminal is connectable to a power terminal of a digital or switching circuit having at least a boost signal output terminal. The boost circuit includes a boost capacitor and a switching arrangement connected to the regulator boost input terminal and connected to the boost capacitor. The switching arrangement is controllable by a boost signal generated by the digital or switching circuit.
Opening claim text (preview).
What is claimed is: 1. A voltage regulator for driving a digital or switching circuit, the voltage regulator comprising: an input terminal and an output terminal, wherein the output terminal is connectable to a power terminal of a digital or switching circuit having at least a boost signal output terminal; a pass device having a gate terminal and being connected between the input terminal and the output terminal; a first capacitor connected between the output terminal of the voltage regulator and a gate of the pass device; and a boost circuit including a boost capacitor, a switching arrangement, and a regulator boost input terminal connectable to the boost signal output terminal of the digital or switching circuit, wherein the switching arrangement is arranged switchable to connect the boost capacitor either in parallel to the first capacitor according to a low power configuration, or between the gate of the pass device and a ground according to a boost configuration, based on a boost signal received at the regulator boost input terminal from the digital or switching circuit. 2. The voltage regulator according to claim 1 , wherein the first capacitor includes a Miller capacitor connected between the output terminal and the gate of the pass device. 3. The voltage regulator according to claim 1 , wherein a capacitance of the first capacitor is larger than or equal to a capacitance of the boost capacitor. 4. The voltage regulator according to claim 1 , wherein the switching arrangement includes a PMOS type switching device and an NMOS type switching device. 5. The voltage regulator according to claim 4 , wherein the boost capacitor is connected to a first node that is connected to a drain of the PMOS type switching device and to a drain of the NMOS type switching device. 6. The voltage regulator according to claim 5 , wherein a gate of the PMOS type switching device and a gate of the NMOS type switching device are connected to the regulator boost input terminal. 7. The voltage regulator according to claim 5 , wherein the boost capacitor is connected to a second node that is connected to the gate of the pass device, which is a PMOS type switching device having a source connected to the input terminal and having a drain connected to the output terminal. 8. The voltage regulator according to claim 1 , wherein the switching arrangement includes an edge detector and a starved inverter. 9. The voltage regulator according to claim 8 , wherein an input of the edge detector is connected to the regulator boost input terminal. 10. The voltage regulator according to claim 1 , further comprising an adaptive bias circuit connected to the pass device and to an amplifier circuit of the regulator. 11. The voltage regulator according to claim 10 , wherein the adaptive bias circuit includes a current mirror topology configured to generate a mirror current equal to a fraction of a current flowing through the pass device and configured to add the mirror current to a static bias current of the amplifier circuit. 12. A portable electronic device comprising: the voltage regulator according to claim 1 ; and at least a first digital or switching circuit having at least a boost output terminal connected to the regulator boost input terminal of the voltage regulator. 13. The portable electronic device according to claim 12 , further comprising a second digital or switching circuit, wherein the voltage regulator comprises at a first regulator boost input terminal connected to the boost output terminal of the first digital or switching circuit and includes a second regulator boost input terminal connected to the boost output terminal of the second digital or switching circuit.
characterised by the feedback circuit · CPC title
using resistors or capacitors, e.g. potential divider · CPC title
using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title
with digital control · CPC title
Electricity · mapped topic
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